{"title":"Recent advances in integrated ferroelectric and multiferroic materials","authors":"M. Maglione","doi":"10.1109/SMIC.2010.5422992","DOIUrl":"https://doi.org/10.1109/SMIC.2010.5422992","url":null,"abstract":"Ferroelectric materials have very appealing properties such as their dielectric permittivity, piezoelectric coefficients and permanent polarization. Two large scale applications of ferroelectric thin films are already achieved: on-chip large capacitances (MIM) and Ferroelectric Random Access Memories (FERAM). The focus is now on the design and reliability of integrated structures. The case of high frequency agile capacitors based on ferroelectric films will be described in details in this respect. Multiferroic materials are under consideration since more than 50 years because of the coexistence and eventually the coupling between polarization and magnetization in a given compound. Since the number of room temperature multiferroics is very restricted at present, several alternative routes including nano-composites or multilayers are under consideration.","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132545637","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 60 GHz wideband high output P1dB up-conversion image rejection mixer in 0.25 µm SiGe technology","authors":"M. Elkhouly, S. Glisic, C. Scheytt","doi":"10.1109/SMIC.2010.5422944","DOIUrl":"https://doi.org/10.1109/SMIC.2010.5422944","url":null,"abstract":"A high output 1dB compression point 60-GHz up-conversion mixer fabricated on 0.25 µm SiGe∶C technology is presented. It is based on the Gilbert cell and integrated with LO passive stacked Marchand balun to convert the LO single ended signal into differential. It employs tuned load consisting of spiral inductor and MIM capacitor to match the differential output to 100 ohm and to attenuate the image signal by 15 dB in the middle of the band. The conversion gain is 2.2-dB in 61 GHz and varies within 2 dB over 9 GHz band We achieve output 1-dB compression point of −3.4 dBm. To the best of our knowledge it is the highest output 1-dB compression point in silicon-based 60-GHz mixers. It consumes 10 mA from 3.3 V supply","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127352982","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Analysis and measurement of a novel on-chip variable delay transmission line with fixed characteristic impedance","authors":"W. Woods, H. Ding, Guoan Wang","doi":"10.1109/SMIC.2010.5422949","DOIUrl":"https://doi.org/10.1109/SMIC.2010.5422949","url":null,"abstract":"RF designs such as phased array antenna systems make use of on-chip electronically controllable delay elements. This paper presents simulations and measurements of on-chip variable delay transmission lines with fixed characteristic impedance in two different technologies. EM simulations in a 130 nm BiCMOS technology show a delay change of 15.6 % is possible while the characteristic impedance of the novel transmission line varies a maximum of 3.7% from the 50 Ω target between two possible delay states. Measurement results from a 45 nm SOI digital technology reveal a maximum delay change of 16.0 % and a maximum characteristic impedance deviation between delay states of 7.4% in a 10 GHz region of the Ka-band between 25 GHz and 35 GHz.","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126601333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Chien-Chung Tsai, Derric Chang, Huan-Sheng Chen, C. Kuo
{"title":"A 11-mW quadrature frequency tripler with fundamental cancellation","authors":"Chien-Chung Tsai, Derric Chang, Huan-Sheng Chen, C. Kuo","doi":"10.1109/SMIC.2010.5422967","DOIUrl":"https://doi.org/10.1109/SMIC.2010.5422967","url":null,"abstract":"A low-power quadrature frequency tripler is designed by using the sub-harmonic mixer configuration. The circuit is implemented in CMOS 0.180um technology. The frequency tripler consumes 11.5mW, while the output buffers consumes 43.1mW, all with supply voltage of 1.8V. The fundamental Harmonic Rejection Ratio (HRR1) achieves more than 35dB, and the conversion gain achieves −4.2dB at output frequency of 4.5GHz. The entire chip area occupied 1.4×1.1 mm2.","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132055966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Integrated on-chip antennas using CMOS circuit ground planes","authors":"H. Yordanov, P. Russer","doi":"10.1109/SMIC.2010.5422945","DOIUrl":"https://doi.org/10.1109/SMIC.2010.5422945","url":null,"abstract":"Wireless communication is an alternative for increasing the chip-to-chip interconnects data rate. Integrated antennas are the most chip area demanding elements of an integrated wireless link. This work investigates the possibility of using the already available on-chip elements like the power supply metallization as a radiating structure, thus integrating the antennas without occupying significant chip area. The operation mode of such antennas is presented and various structures are investigated. The influence of the CMOS interconnects on the antennas has been studied. An experimental setup for verifying the properties the proposed antenna structures has been designed.","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132619891","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Power waves formulation of oscillation conditions: Avoidance of bifurcation modes in cross-coupled VCO architectures","authors":"S. Wane, D. Bajon","doi":"10.1109/SMIC.2010.5422986","DOIUrl":"https://doi.org/10.1109/SMIC.2010.5422986","url":null,"abstract":"This paper discusses necessity of power-waves formulation to extend voltage-current oriented approaches based on linear concepts such as admittance/impedance operators and transfer-function representations. Importance of multi-physics methodologies, throughout power-waves formulation, for the analysis and design of crystal oscillators is discussed. Interpretation of bifurcation modes in differential cross-coupled VCO architectures in terms of gyrator-like behavior, is proposed. Impact of amplitude level control (ALC) on large-signal phase noise performances is underlined showing necessity of robust control analysis approach relative to power-energy considerations.","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130110550","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Ultra-wideband low noise amplifier with shunt resistive feedback in 0.18µm CMOS process","authors":"A. Galal, R. Pokharel, Haruichi Kanay, K. Yoshida","doi":"10.1109/SMIC.2010.5422832","DOIUrl":"https://doi.org/10.1109/SMIC.2010.5422832","url":null,"abstract":"A CMOS low noise amplifier (LNA) for ultra-wideband (UWB) systems is presented. The proposed LNA achieve wide operating bandwidth for 3–10.6 GHz by using resistive shunt feedback topology. Two stage amplifiers and an inter stage circuit are designed to achieve wider gain bandwidth. The shunt resistive feedback are employed in input and output stage to provide wideband input matching with low noise figure (NF). This work is designed and fabricated in TSMC 0.18µm CMOS process. The proposed UWB LNA achieves a measured flat gain 15 dB and has a noise figure of 4 dB over the entire band while consuming 21.5 mW of power. The measured third order intercept point IIP3 is 2.5 dBm.","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132853746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A de-embedding procedure for one-port active mm-wave devices","authors":"H. Xu, E. Kasper","doi":"10.1109/SMIC.2010.5422795","DOIUrl":"https://doi.org/10.1109/SMIC.2010.5422795","url":null,"abstract":"After conventional lumped-element de-embedding method (open-short and short-open) for a 1-port active element, the remaining impedance errors are observed above 30GHz. In order to minimize the de-embedding errors for on-wafer measurement technique, a new de-embedding procedure based on the S-parameter description of the waveguide used as interconnect between device under test and prober head is proposed. The method is as tested with an integrated Si-Schottky diode up to 110GHz. Reliable data were obtained","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123764385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
F. Starzer, H. Forstner, C. Wagner, R. Feger, S. Scheiblhofer, A. Fischer, H. Jager, A. Stelzer
{"title":"A novel 77-GHz radar frontend with 19-GHz signal distribution on RF-PCB substrate","authors":"F. Starzer, H. Forstner, C. Wagner, R. Feger, S. Scheiblhofer, A. Fischer, H. Jager, A. Stelzer","doi":"10.1109/RWS.2010.5434104","DOIUrl":"https://doi.org/10.1109/RWS.2010.5434104","url":null,"abstract":"A novel radar frontend for 77 GHz mid-range-radar (MRR) and short-range-radar (SRR) applications is presented. The radar sensor makes use of a Colpitts oscillator, frequency multipliers, and a transceive (TRX) mixer. A single sensor contains up to four channels using antenna arrays for angular detection relative to the sensor. The characterization of the integrated circuit's parameters has been carried out using a two-channel sensor with waveguide (WG) transitions. A radar measurement scenario has been realized using a four-channel sensor with a differential antenna array. All sensors have been implemented on off-the-shelf printed circuit board (PCB) substrate.","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125124154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A sub - 2 dB noise figure wideband LNA in 65 nm CMOS for mobile TV applications","authors":"A. Youssef, A. Ismail, J. Haslett","doi":"10.1109/RWS.2010.5434173","DOIUrl":"https://doi.org/10.1109/RWS.2010.5434173","url":null,"abstract":"A novel broadband CMOS LNA based on the noise-canceling approach has been designed and implemented in 65 nm CMOS technology. The noise-canceling mechanisms used in this LNA allow the achievement of a noise figure as low as 1.6 dB to be feasible across the VHF/UHF bands without using any inductors. The LNA has a gain greater than 36 dB and consumes only 18 mW of power.","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116860215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}