Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium最新文献

{"title":"Establishing A System To Improve The Quality Of Material From The Supplier","authors":"R. Bothwell","doi":"10.1109/IEMT.1992.639852","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639852","url":null,"abstract":"In order to start a quality program, a foundation needs to be started on which to build. How well is your product organized? How good are your processes and procedures? How well is the process flow organized? How well do you keep metrics? It is extremely important to realize that a quality improvement program starts with the first step, not when you complete a checklist, like the list above. Another essential ingredient to a quality improvement program is management \"buy in\" and the will or desire to get better. As the data for the quality improvement programs become available, some problems will be embarrassing, obvious, repetitious, and frustrating. Senior managements' role is to be supportive. Without the real inward desire to make the process better, the quality improvement program will be reduced to number crunching, or number creativity.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121471642","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Excimer Vs ND:YAG Laser Creation Of Silicon Vias For 3D Interconnects","authors":"R. Lee, W. A. Moreno, R. Gassman, D. Miller","doi":"10.1109/IEMT.1992.639920","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639920","url":null,"abstract":"Rex A. Lee and Wilfrido A. Moreno Center for Microelectronics Research University of South Florida Tampa, Florida and Richard A. Gassman and Doyle Miller Sandia National Laboratories Albuquerque, New Mexico","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128618281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Automated Preventive Maintenance Of Plasma Etch Systems With The Secs Protocol","authors":"P. F. Byrne, D.S. Youlton, K.R. Heiman, A. Miller","doi":"10.1109/IEMT.1992.639877","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639877","url":null,"abstract":"Wafer Fabrication equipment requires scheduled preventive maintenance (PM) to insure the optimum system performance and uptime in production environments. System down time can severely impact the utilization and profitability of a semiconductor manufacturing plant. Preventive maintenance is performed manually on a routine basis ranging from daily PMs to annual PMs by equipment engineers and technicians. The manual acquisition of PM data can vary drastically from one technician to anot.her causing unneeded system down time and inaccurate data tracking. Investigated here is a new software package called LamPM that automates the daily PMs on plasma etch systems through the Semiconductor Equipment Communication Standard (SECS-II) protocol. Leak rates and Mass Flow Controller (MFC) data is automatically collected and stored with tolerance limits applied to the data. The user is then informed of failures. Automating the daily PM reduces technician hours while providing accurate: and consistent data. Jntroduction","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"142 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133070663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Semiconductors: A Key To The Nation's Competitiveness","authors":"W. Troutman, C. Barrington","doi":"10.1109/IEMT.1992.639914","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639914","url":null,"abstract":"Semiconductors lie at the heart of this nation’s industrial might and national security. Semiconductors are the building blocks of electronic products; and most industries, whether they manufacture products or deliver services, depend on electronics for their competitive advantage. Global competition in semiconductors and electronic products is jierce. But, the rewards are great. Electronics, a $750 billion global enterprise, employs large numbers of people with a broad set of skills. It is not fortuitous that many governments have been quick to realize the economic implication of a strong electronics sector and have set about developing policies and practices to both develop and nurture their domestic sectors. This paper traces key market trends in both semiconductors and electronics, and root causes are offered to explain the loss of US. market share in the various product areas. Linkages will be identifred between semiconductors, electronic products and the broad set of industries that depend on electronics. And, an argument will be set forth that strength in these three sectors depends on strength in each component (the chain being as strong as the weakest link). Finally, the proposals of the National Advisory Committee on Semiconductors, aimed at assuring robustness in semiconductor and electronic product markets, will be sketched. These proposals address a number of key issues, such as: improving industrial investment in plants and equipment, stimulating high-volume electronics manufacturing, and renewing the commitment to highquality manufacturing skills. These proposals are broad enough that, if acted upon, they would greatly enhance the global competitiveness of many US. industries. The Case for Semiconductors The U.S. semiconductor industry is a critical base for the hightechnology industry that, in turn, is vital to the country’s wellbeing. Land, labor, and capital once determined the economic strength of nations. Today, technology must be added as a fourth contributor. The standard of living and security of industrial nations have been linked to the success of high-technology industries, including aircraft, computers, telecommunications, and consumer electronics. To maintain its prosperity, the United States (both private industry and the various, relevant government departments and agencies) must take the necessary steps to assure that a process is in place that enables a continuous creation of a competitive advantage in such industries. High-technology industries are critically linked to each other and to their underlying technologies by a number of customer-supplier relationships. Customers must stimulate suppliers with abundant leading-edge systems applications and a market large enough to support investment in the suppliers’ people, technology development and manufacturing facilities. Suppliers must be easily accessible and willing to work closely with customers to provide timely delivery, improve their products, and to be respon","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121405725","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Alignment Techniques For High Precision Pick And Place In Electronic Packaging","authors":"Sung-Ping Sun, Fei-jain Wu","doi":"10.1109/IEMT.1992.639921","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639921","url":null,"abstract":"High density, high performance circuitry requires precision placement of components to optimize signal ropagation. As the tolerance for pick-and-place operations geing tightened, alignment mechanism must evolves to com ete. A detailed study on alignment not only includes the objectivity and operational process. In this article, we investigate two ap roaches for alignment, and detail the comparison. The grst method employs a calibration process to precisely locate machine components, such as measuring apparatus and end-effectors, relative to the moving mechanism. Mechanical stability is assumed. The second approach performs alignment while the object is very close to the target. The alignment method does not require precise system calibration of the system. Applications in MCM, such as hybrid, TAB, Flipchip, Flip-Chip-on-Glass, are analyzed. To effectively demonstrate the alignment approaches, mec I: anical and optical limitations, but also considers its","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"11 8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128845853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Lead On Chip TSOP Assembly Process For Fast Sram With Peripherally Located Bond Pads","authors":"D. Hagen, J. McDermott, J. Bigler, D. Cavasin, F. Primeaux, Ziep Tran, David D. Afshar","doi":"10.1109/IEMT.1992.639859","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639859","url":null,"abstract":"Plastic IC encapsulation utilizing Lead On Chip (LCC) die attach is ar1 emerging technology. In applications where a amall package outline is required for large dice with relatively few interconnects, it allows higher device density per unit package area than conventional assembly techniques. Application of I,OC technology for a 4 megabit fast SRAM device assembled in a Thin Small Outline Package (TSOP) is disciussed. The LOC process has been adapted to accommodate peripherally-placed bond pads, via modification of the leadframe design. Because the bonding pads are placed on the periphery of the die rather than centered Zongitudinally on the die surface, the same die can be aasembled with both LOC and conventional technoloqies. Package design, process, and material selection arei discussed. Jntroduct ion A new generation of memory devices is introduced every three years. With each new generation, memory capacity is increased four times and the area of the die is increased one hundred fifty percent.1 Due to limitations in surfacc mount board densities, package sizes have not increa:;ed in size proportionally. Lead on Chip (LOC) , an assembly technology, originally called Area Wire Bond (A-Wire), was developed by IBM to address some of the piroblems associated with having a very large die in a small package.2","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114173897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Dispatching Rules For Semiconductor Testing Operations: A Computational Study","authors":"R. Uzsoy, L. Church, I. M. Ovacik, J. Hinchman","doi":"10.1109/IEMT.1992.639903","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639903","url":null,"abstract":"In this paper we compare the performance of different dispatching rules in a semiconductor testing environment for a variety of due-date and cycle time related performance measures. We also examine the effect of different models of job arrivals and uncertainties in the problem data on the performance of the dispatching rules. Our results indicate that no one rule performs well for all performance measures, and that performanceis robust to uncertainties and non-homogeneity in the arrival process.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122162212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The Comparison Of Response Surface And Taguchi Methods For Multiple-response Optimization Using Simulation","authors":"K. Jones, M. Johnson, J. Liou","doi":"10.1109/IEMT.1992.639855","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639855","url":null,"abstract":"and DFM can be surface methods coupled functions and the functions. Desirability responses are to their acceptability for function for the des manufacturing to1er;nces to the responses. Tte by using the outer formulation of the easily handle application, Young models to generate the outer array. This fewer simulations of inner and outer of the RSM models responses is applicable variables are a sublset If the noise variables variables then it i s ment in which the array. Young et al. [ I ] Ken Jones, Mark Johnson*, J.J. Liou'","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124724058","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Process Modelling And Advanced Design Techniques For A Multi-chip Hybrid Package","authors":"S. Kadakia, T. E. Donovan, D. Gupta","doi":"10.1109/IEMT.1992.639896","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639896","url":null,"abstract":"Packaging technology has seen the familiar trends of the electronic industry with increasing size and wireability requirements. Along with those requirements come new materials to improve performance and tighter groundrules to increase interconnectivity. These requirements and new materials must be understood in order to insure manufacturability of new products for the marketplace. In IBM, this path is seen in the migration of Thermal conduction module (TCM) made with AI203 (Alumina) ceramic to the new ES9000 T C M made with glass-ceramic (G/C) and thin film. This paper prescnts process modelling and design techniques that assisted IBM in the manufacturing success of this new hybrid technology. The ES9000 T C M is a 127mm square module made of Corderite glass-ceramic that is 63 layers thick. It has up to 121 chip sites with decoupling capacitors a t the corners of the chips (figure I). There are 2772 1/0 pins for power and signal and this substrate can cool up to 2000 watts with it's water cooled cap (figure 2). This substrate supports 14 planc pairs of wiring that can have roughly 400 meters of interconnect wiring. Key features include partial thin film redistribution and buried engineering change (EC) wiring planes to assist in minor EC capability as well as repair. Fig.1. ES/9000 glass-ceramic substrate Fig.2. ES/9000 Module Assembly","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"156 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120865902","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Expert System For Manufacturing","authors":"T. Leong, Lee Ling Ling, Ching Kah Hiang, Yap Chun Ming, K. SeeIan, R. Martin","doi":"10.1109/IEMT.1992.639871","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639871","url":null,"abstract":"Manufacturing line management and troubleshooting s cenarios can b e narrowly defined and efficiently handled by an expert system. This paper describes a PC-based expert system electronically","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116511638","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}