Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium最新文献

{"title":"Trends In Manufacturing Effectiveness","authors":"G. Blonder","doi":"10.1109/IEMT.1992.639913","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639913","url":null,"abstract":"Compared to the rest of the world, the United States has stagnated or fallen behind in its investment in research and new manufacturing capabilities. Many are worried that this lack of resolve will further erode our standard of living and ability to compete. Unfortunately, direct measures of research and manufacturing productivity are rarely available or trustworthy. We will discuss some of these trends, and try to draw reasonable conclusions for where we are and where we are going.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132213934","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Silicon Micro-mechanics For Solid State Sensors","authors":"J. Haviland","doi":"10.1109/IEMT.1992.639878","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639878","url":null,"abstract":"Since even before the first successful demonstration of the transistor in 1947, evolving semiconductor processing technology has lent itself well toward use in sensing of various physical phenomena. The first record of silicon used as a sensor was in 1940, when Robert Oh1 of Bell Labs discovered the photoelectric effect in silicon. In 1953, Philco was already using chemical micromachining to shape semiconductors. This paper explores the history of the semiconductor developments which have led to today's state of the art monolithic silicon sensors with on-chip self test, self calibration, and signal conditioning. These devices are part of the continuing evolution of smart monolithic sensors which have been and will continue to be made possible and economical by the continuing development of silicon manufacturing technology. Sensor Backaround There are two classes of silicon sensors considered here. The first utilizes only the electrical properties of silicon, and is included here primarily for reference. The second class of sensors utilizes the mechanical, and sometimes the electrical properties, and is the real subject of the discussion. Within each of these classes, there are several different sensing techniques (piezoresistive, capacitive, etc.), as well as various stimuli (pressure, acceleration, etc.) that may be sensed with each sensing technique. Silicon Sensors Utilizina Electrical ProDerties This class of sensors utilizes the Hall effect for measuring magnetic fields, and the band gap of silicon for measuring heat and light. Although they often utilize special layouts or modified manufacturing processes to enhance the sensitivity to the desired stimulus, these sensors historically have relied upon integrated circuit processing without further machining or mechanical enhancements. As such, they are typically very economically produced, and can inherently combine the functions of circuit and sensor, making them inexpensive and elegant solutions for many sensing and control problems.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130239117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Machine Vision In Robotic Guidance For Pga Burn-in Board Loading","authors":"E. Peng","doi":"10.1109/IEMT.1992.639864","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639864","url":null,"abstract":"Eng Chin Peng Penang Package Technology Development Intel Technology Sdn.Bhd. Bayan Lepas Free Trade Zone 1 1900 Penang, Malaysia The prototype Auto Burn-in Board Loading machine is designed to automate the manual process of loading Pin Grid Array (PGA) package to burn-in board. The challenge of this project is the capability of auto-inserting high pin count PGA for example, a 168 lead PGA package into a 168 hole socket precisely onto the burn-in board socket. Pioneering effort had been made in computer vision. By integrating a low cost PC based vision system to guide a Cartesian robot, the integrated system proved to perform accurate insertion of PGA package to the burn-in board socket. This paper describes the system approach of a PC based vision system with a Cartesian robot integration. It also covers image processing algorithms and techniques in positioning recognition and compensation of PGA package and burn-in board socket.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127473341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"No-clean And Water-clean Mass Reflow Processes Of 0.4 mm Pitch, 256-Pin Fine Pitch Quad Flat Packs (QFP)","authors":"John H. Lau, R. Govila, C. Larner, Y. Pao, S. Erasmus, S. Dolot, V. Solberg","doi":"10.1109/IEMT.1992.639909","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639909","url":null,"abstract":"The water-clean and no-clean mass reflow processes of the 0.4 mm pitch, 28 mm body size, and 256-Pin fine pitch quad flat packs (QFP) are presented. Emphasis is placed on the fine pitch parameters such as the printed circuit board (PCB) design, solder paste selection, stencil design, printing technology, component placement, mass reflow, and cleaning. Furthermore, the cross sections of the assemblies from both processes have been thoroughly studied using scanning electron microscopy (SEM).","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"175 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124325103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Laser-based Noncontact In SZTU Overdrive Of Electronic Modules","authors":"K. Umstadter, D. Millard, R. Block","doi":"10.1109/IEMT.1992.639891","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639891","url":null,"abstract":"The costs of removing printed wiring boards for analysis along with the decreasing feature sizes associated with microelectronic components and circuit boards has initiated the research and development of fine-pitch, in situ test systems. We have continued development of a nonxontact testing system to analyze PWBs while under operation. The potential of this system to overdrive logic circuits via signal injection has also been investigated, in which the data indicates this NCT approach is an excellent technique to analyze hardware under operation without disruption. Results also indicate that this NCT electrode would be an excellent “front-end-tester” for systems that are already in-service, thereby providing a low cost improvement of existing hardware.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115200858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Evaluation Of Product And Process Design In Electronics","authors":"M. McMahon, R. Prasannappa, J. Baras, G. Zhang, Abraham Kebede, P. Mendicino","doi":"10.1109/IEMT.1992.639902","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639902","url":null,"abstract":"This paper describes techniques and an implementation for managing costs and quality of electronics products during design. Emphasis is given to the development of an economic model to estimate the production costs at the assembly level. The unique feature of this system is to bring the experience of a manufacturing engineer, quality engineer, and cost controller into the hands of a designer. Such an early integration of manufacturing knowledge creates a concurrent engineering environment which improves product quality and reduces cost through careful monitoring of the design phase.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123218618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The Economics Of Future Semiconductor Manufacturing","authors":"D. A. Longfellow, A. Allan","doi":"10.1109/IEMT.1992.639916","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639916","url":null,"abstract":"The objective of this study was to model the maximum factory costs that could be borne byfuture generations of semiconductor technologies, and to determine the sensitivity of those projections to changes in the model's major assumptions. The modeling results suggest that factory costs in excess of $2 billion are reaZistic for manufacturing lines producing the 256 AIbit and 1 Gbit memo y generations. This result is consistent with factory cost estimates made by projecting future equipment requirements and costs.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116681464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Military Multichip Module Packaging Design And Manufacture","authors":"C. Cleveland, D. Pietila, M. Rassaian, T. White","doi":"10.1109/IEMT.1992.639893","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639893","url":null,"abstract":"Multichip modules (MCM) are being developed as a lightweight, high performance packaging technology for advanced electronics systems. Specifically, the hermetic form of MCM provides the highest level of circuit integration and performance for military applications. MCM technology development includes the design and manufacture of a variety of substrate types, assembly methods, and package. constructions. The selection of the most appropriate MCM technology is driven by specific design requirements and cost. Design-for-manufacturability is key to minimum cost and maximum producibility. This paper discusses MCM packaging design and manufacturing plus reliability and durability issues relating to qualification for military application.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121977561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Optimization Of Mold Process Parameters And Tooling Variables For Highest Quality Plastic Packaging","authors":"Janice Wittmershaus, R. Kar, W. Verwoerd","doi":"10.1109/IEMT.1992.639857","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639857","url":null,"abstract":"A novel approach to understanding the impact of the large number of variables that play a role in the quality of the molded product was undertaken for very large, high pin count devices. Both mold process and tooling variables were optimized by varying 10 important input parameters in a fractional f actorial experimental design. As opposed to traditional studies, where mold process parameters are varied to select the best compromise setting for selected criteria, both process (mold temperature, transfer profile, cure time, pellet preheat temperature, and leadframe preheat temperature) and tooling (cavity depth, gate depth, gate angle, location of gate, and cull design) variations were studied and the interaction between them determined. A single plunger Per cavity mold system was utilized to allow easy tooling changes. The experimental design permitted determination of all main effects and some two factor interactions. Other interactions were confounded and required some understanding of the mold process to determine most likely effects. Package quality was judged by package warpage, diepad tilt, wiresweep, delamination, and visual defects such as voids, blisters, and porosity. The end result showed which variable effected which output characteristics and allowed determination of mold process and tooling conditions for optimum package quality with the trade-offs very well understood.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126553561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"New Requirements And Solutions For Product Data Processing Of Three-dimensional Molded Interconnection Devices","authors":"K. Feldmann, J. Franke","doi":"10.1109/IEMT.1992.639869","DOIUrl":"https://doi.org/10.1109/IEMT.1992.639869","url":null,"abstract":"The design of electronical devices is determined by seperate construction of flat printed circuit boards with discret components and its insertion into a mechanical unit. New chances of integrating housing and circuitry by means of three-dimensional Molded Interconnection Devices (3D-MIDs) results not only in new challenges of assembly technique but first of all in new requirements for processing product data. Submitted essay gives an overview of new requirements to handle three-dimensional data in designing electronical products especially3D-MIDs. Promising steps for integrating the functionalit of CAD systems for electronical (ECAD) and mechanical (MYCAD) applications are described and further developments to introduce 3-D-ECAD-Systems are presented. 1. Steps of lntearation in Production EleCtronic Products The current trend in the field of electronic equipment production, from the product development stage through to market launch, is characterized by extremely short innovation cycles. The main cause for this tendency is the rapid development of microelectronics as a base technology which has given rise to equally rapid advances in the implementation of new equipment structures. The trend has been further intensified by the general demands of the market for greater product variation and a higher power density in the electronic. devices. The strong requirements can be corresponded with the use of computer aided tools in planning, design and manufacturing. In the production of electronic devices in particular, there is an extraordinarily close correlation between the introduction of rational manufacturing technologies and the formation of new product structures. Conventional equipment designs have until now been characterized b discrete production steps (figure 1). A board is constructechrom individual components and then mounted in the unit. The advantages of this method are optimized single processes and functionally reliable subsystems. The main disadvantage however is the size of the final device.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125234508","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}