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2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)最新文献

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Faster Localization of Logic Soft Failures Using a Combination of Scan Diagnosis at Reduced VDD and LADA 基于低VDD和LADA的扫描诊断快速定位逻辑软故障
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-16 DOI: 10.1109/IPFA.2018.8452553
S. Goh, Y. Ngow, B. Yeoh, Edy Susanto, H. Hao, M.H. Thor, Zhao Lin, Y. Chan, J. Lam, Tay Chee Chun
{"title":"Faster Localization of Logic Soft Failures Using a Combination of Scan Diagnosis at Reduced VDD and LADA","authors":"S. Goh, Y. Ngow, B. Yeoh, Edy Susanto, H. Hao, M.H. Thor, Zhao Lin, Y. Chan, J. Lam, Tay Chee Chun","doi":"10.1109/IPFA.2018.8452553","DOIUrl":"https://doi.org/10.1109/IPFA.2018.8452553","url":null,"abstract":"In recent years, understanding the root cause of soft failures has been of considerable interest because it is challenging yet prevalent in advanced technologies. With increasing demands for faster diagnostic to issue fix, it is important to explore new methodologies that enable fast fault localization which is typically the bottleneck. Currently, laser-assisted device alteration (LADA) is well-established to reveal circuit speed paths or device limiters that respond to laser stimulation. It is effective but suffers from long inspection time which is worse on large chips. In this paper, a first localization step based on an unconventional application of scan diagnosis is proposed prior to LADA execution. This gives rise to a more precise search area, hence, a significant reduction in the turnaround time for laser interrogation. A case study illustrates.","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132846122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Fault Isolation of Die-to-Die Communication Error Failure 模对模通信错误故障隔离
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-01 DOI: 10.1109/IPFA.2018.8452505
Song Jinrong, T. Li, Ren Jun, Di Hairong, Yang Jianli
{"title":"Fault Isolation of Die-to-Die Communication Error Failure","authors":"Song Jinrong, T. Li, Ren Jun, Di Hairong, Yang Jianli","doi":"10.1109/IPFA.2018.8452505","DOIUrl":"https://doi.org/10.1109/IPFA.2018.8452505","url":null,"abstract":"This paper presented two real cases on the fault isolation of die-to-die communication error failure. A new method was introduced to maintain backside accessibility while the interbonding signals can be measured from front side. Based on the interbonding signal failing symptom, customized functional Optical Beam Induced Resistance Change(OBIRCH) or Photon Emission Microscopy(PEM) analysis proved to be very efficient for the fault isolation.","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115344202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Case Study on Wire Bonding - Related Partial Discharge on High-Voltage Isolators 高压隔离器焊丝粘接引起局部放电的实例研究
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-01 DOI: 10.1109/IPFA.2018.8452558
Manita Duangsang, Nophakam Thankham
{"title":"Case Study on Wire Bonding - Related Partial Discharge on High-Voltage Isolators","authors":"Manita Duangsang, Nophakam Thankham","doi":"10.1109/IPFA.2018.8452558","DOIUrl":"https://doi.org/10.1109/IPFA.2018.8452558","url":null,"abstract":"Most devices which failed during High Voltage Isolation Testing seen a lateral dielectric breakdown after decapsulation. Failure analysis results explained the irregularity in IC assembly process causing the partial discharge that leads to dielectric breakdown, called treeing. This explanation together with root cause verification and wire bond parameter simulation from assembly process pointed out that the improper parameter modification resulted to electrical treeing.","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115410097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Program Booklet 程序手册
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-01 DOI: 10.1109/ipfa.2018.8452523
October 14-15th
{"title":"Program Booklet","authors":"October 14-15th","doi":"10.1109/ipfa.2018.8452523","DOIUrl":"https://doi.org/10.1109/ipfa.2018.8452523","url":null,"abstract":"Document Type Article Publication Date 2011 Abstract Benjamin Franklin: In Search of a Better World was organized by the Benjamin Franklin Tercentenary and the American Library Association Public Programs Office. The traveling exhibition for libraries has been made possible by a major grant from the National Endowment for the Humanities. In addition to the reproductions of original documents highlighted in the exhibit, we encourage you to peruse material by and about Franklin available digitally and in print at Booth Library. Recommended Citation Knight-Davis, Stacey, \"Program Booklet\" (2011). Ben Franklin: Exhibit Booklet. 1. https://thekeep.eiu.edu/ben_franklin/1  Download","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121222034","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A New Method in Creating Carrier Package for Repackage 一种创建再包装载体包的新方法
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-01 DOI: 10.1109/IPFA.2018.8452586
Homg-Chang Liu, Chun-Hsiung Chung, Shou-Ming Huang
{"title":"A New Method in Creating Carrier Package for Repackage","authors":"Homg-Chang Liu, Chun-Hsiung Chung, Shou-Ming Huang","doi":"10.1109/IPFA.2018.8452586","DOIUrl":"https://doi.org/10.1109/IPFA.2018.8452586","url":null,"abstract":"In the past, chemical acid was used to etch out remaining compound on the lead frame to create carrier package for repackage. As an artifact of the process, the silver coating which is needed for a reliable thermosonic bonding is also damaged or etched. This is not acceptable when analyzing failure device. By developing new method in removing the remaining compound after laser ablation, a good carrier package can be produced by submerging device into ethanol and removing remaining compound by polishing fleece.","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124856798","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Radiation Hardness Testing of Super-Junction Power Mosfets by Heavy Ion Induced SEE Mapping 用重离子诱导SEE映射法测试超结功率mosfet的辐射硬度
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-01 DOI: 10.1109/IPFA.2018.8452587
M. Gerold, A. Bergmaier, C. Greubel, J. Reindl, G. Dollinger, M. Rüb
{"title":"Radiation Hardness Testing of Super-Junction Power Mosfets by Heavy Ion Induced SEE Mapping","authors":"M. Gerold, A. Bergmaier, C. Greubel, J. Reindl, G. Dollinger, M. Rüb","doi":"10.1109/IPFA.2018.8452587","DOIUrl":"https://doi.org/10.1109/IPFA.2018.8452587","url":null,"abstract":"In this work direct heavy ion mapping of Single Event Effect (SEE) and Single Event Burnout (SEB) of super-junction power MOSFETs utilizing a high energy (55MeV) carbon micro-beam is presented. The resulting maps are sub-structurally resolved. Effect location, signal level and possible connections to cosmic radiation events are discussed.","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125266473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Copper Wire Bond Optimization for Power Devices 电力器件的铜线键合优化
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-01 DOI: 10.1109/IPFA.2018.8452561
T. Pinili, R. Manolo, A. Denoyo, B. Yabut, D. Moore, B. Cowell, J. Jenson, K. Truong, J. Gambino, R. Watkins, W. Qin, G. Brizar, J. De Clerq
{"title":"Copper Wire Bond Optimization for Power Devices","authors":"T. Pinili, R. Manolo, A. Denoyo, B. Yabut, D. Moore, B. Cowell, J. Jenson, K. Truong, J. Gambino, R. Watkins, W. Qin, G. Brizar, J. De Clerq","doi":"10.1109/IPFA.2018.8452561","DOIUrl":"https://doi.org/10.1109/IPFA.2018.8452561","url":null,"abstract":"We report on bond pad damage for a smart power device using 50.8 µm (2 mil) diameter Pd-coated Cu wire. We show that the damage can be relatively subtle; the wire bonds on damaged structures have high pull and shear strength, but cracks in the underlying regions lead to metal extrusions that cause electrical shorts.","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116579420","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
IPFA 2018 Technical Program IPFA 2018技术计划
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-01 DOI: 10.1109/ipfa.2018.8452555
{"title":"IPFA 2018 Technical Program","authors":"","doi":"10.1109/ipfa.2018.8452555","DOIUrl":"https://doi.org/10.1109/ipfa.2018.8452555","url":null,"abstract":"","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122426914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Failure Analysis Techniques for 3D Packages 3D封装失效分析技术
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-01 DOI: 10.1109/IPFA.2018.8452534
F. Altmann, S. Brand, M. Petzold
{"title":"Failure Analysis Techniques for 3D Packages","authors":"F. Altmann, S. Brand, M. Petzold","doi":"10.1109/IPFA.2018.8452534","DOIUrl":"https://doi.org/10.1109/IPFA.2018.8452534","url":null,"abstract":"3D packing technologies integrate different components in three dimensions in one device to increase performance, functional density and reduce the devices footprint. Due to the increasing complexity and the miniaturization new and specifically 3D-adapted failure analysis methods and corresponding workflows are required to cover technology qualification as well as for process and quality control. This paper will give an overview of available and recently developed failure analysis techniques suitable for 3D packaged devices. In particular, the potential of lock in thermography and high resolution scanning acoustic microscopy for defect localization and new laser and focused ion beam-based techniques for efficient sample preparation will be highlighted. Their application is demonstrated in case studies performed at stacked die devices and Through Silicon Via interconnects.","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"3 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114131357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Ultra-thin Bulk Silicon Thinning for Visible Light Probing with High Numerical Aperture Solid Immersion Lens Laser Imaging 高数值孔径固体浸没透镜激光成像可见光探测的超薄体硅减薄
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-01 DOI: 10.1109/IPFA.2018.8452609
T. W. Siang, S. Wei, C. Richardson
{"title":"Ultra-thin Bulk Silicon Thinning for Visible Light Probing with High Numerical Aperture Solid Immersion Lens Laser Imaging","authors":"T. W. Siang, S. Wei, C. Richardson","doi":"10.1109/IPFA.2018.8452609","DOIUrl":"https://doi.org/10.1109/IPFA.2018.8452609","url":null,"abstract":"Visible Light Probing techniques are of mounting importance in improving the spatial resolution for increasingly miniaturized process technologies and demands of the sample preparation processes, precise control, and visible light metrology tools to obtain ultra-thinned samples. Current CNC contour milling processes are employed to prepare samples at $50 mu mathrm{m}$ remaining silicon thicknesses to $pm 5 mu mathrm{m}$ tolerances. In this work, a new process is proposed to significantly reduce process time and to prepare samples to tighter tolerances down to sub- $5 mu mathrm{m}$ thicknesses compatible with Visible Light Probing techniques.","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128715526","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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