发布求助
文献互助 智能选刊 最新文献

VLSI design (Print)最新文献

筛选
英文 中文
IBM's Blue Logic Design Methodology-Circuits and Physical Design IBM的蓝色逻辑设计方法-电路和物理设计
VLSI design (Print) Pub Date : 1900-01-01 DOI: 10.1109/VLSID.2001.10013
Ruchira Kamdar, Seetharam Gundurao, R. Joshi, N. S. Murty
{"title":"IBM's Blue Logic Design Methodology-Circuits and Physical Design","authors":"Ruchira Kamdar, Seetharam Gundurao, R. Joshi, N. S. Murty","doi":"10.1109/VLSID.2001.10013","DOIUrl":"https://doi.org/10.1109/VLSID.2001.10013","url":null,"abstract":"As the dimensions of ULSI circuits shrink to 0.12 micron and below, to achieve the highest device performance and density many challenges are to be met in designing circuits with performance driven physical design and the wirability of sea of transistors of the order of 100 million. This particular tutorial intends to cover advances in technology, relevant circuit techniques, synthesis and physical design methodology.","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132924997","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-Power Mobile Wireless Communication System Design: Protocols, Architectures, and Design Methodologies 低功耗移动无线通信系统设计:协议、架构和设计方法
VLSI design (Print) Pub Date : 1900-01-01 DOI: 10.1109/VLSID.2001.10011
A. Raghunathan, S. Dey
{"title":"Low-Power Mobile Wireless Communication System Design: Protocols, Architectures, and Design Methodologies","authors":"A. Raghunathan, S. Dey","doi":"10.1109/VLSID.2001.10011","DOIUrl":"https://doi.org/10.1109/VLSID.2001.10011","url":null,"abstract":"The demand for ubiquitous information access and manipulation (anytime, anywhere computing and communications) has created significant challenges and opportunities for the semiconductor industry. The revenue from wireless voice/data handsets is expected to exceed that from PCs in the near future, and the use of wireless internet access is expected to overtake fixed internet access in the next few years.","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122393972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Gate-Induced Barrier Field Effect Transistor (GBFET) - A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems 栅极感应势垒场效应晶体管——一种用于有源矩阵液晶显示系统的新型薄膜晶体管
VLSI design (Print) Pub Date : 1900-01-01 DOI: 10.1109/VLSID.2006.93
J. Sivagnaname, H. Ngo, K. Nowka, R. Montoye, Richard B. Brown
{"title":"Gate-Induced Barrier Field Effect Transistor (GBFET) - A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems","authors":"J. Sivagnaname, H. Ngo, K. Nowka, R. Montoye, Richard B. Brown","doi":"10.1109/VLSID.2006.93","DOIUrl":"https://doi.org/10.1109/VLSID.2006.93","url":null,"abstract":"Using two-dimensional simulation, we report a new gate-induced barrier field effect transistor (GBFET) which exhibits at least three orders of magnitude less OFF state leakage current when compared to a conventional poly-Si TFT. We demonstrate that the GBFET is completely free of pseudo-subthreshold conduction making it a very attractive device for active matrix liquid crystal display systems.","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126487019","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Functional Verification of Programmable DSP Cores 可编程DSP核心的功能验证
VLSI design (Print) Pub Date : 1900-01-01 DOI: 10.1109/VLSID.2001.10010
M. Mehendale, Santhosh Kumar Amanna
{"title":"Functional Verification of Programmable DSP Cores","authors":"M. Mehendale, Santhosh Kumar Amanna","doi":"10.1109/VLSID.2001.10010","DOIUrl":"https://doi.org/10.1109/VLSID.2001.10010","url":null,"abstract":"","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127449958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
System Level Testability Issues of Core Based System-on-a-Chip 基于核心的片上系统的系统级可测试性问题
VLSI design (Print) Pub Date : 1900-01-01 DOI: 10.1109/VLSID.2001.10017
V. Ranganatha, R. Sunda
{"title":"System Level Testability Issues of Core Based System-on-a-Chip","authors":"V. Ranganatha, R. Sunda","doi":"10.1109/VLSID.2001.10017","DOIUrl":"https://doi.org/10.1109/VLSID.2001.10017","url":null,"abstract":"","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129054139","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Keynote Address 主题演讲
VLSI design (Print) Pub Date : 1900-01-01 DOI: 10.1109/VLSID.2006.109
M. Rhodes
{"title":"Keynote Address","authors":"M. Rhodes","doi":"10.1109/VLSID.2006.109","DOIUrl":"https://doi.org/10.1109/VLSID.2006.109","url":null,"abstract":"","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132574525","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The New Electronics Industry 新型电子工业
VLSI design (Print) Pub Date : 1900-01-01 DOI: 10.1109/VLSID.1996.10019
Thomas J. Engibou
{"title":"The New Electronics Industry","authors":"Thomas J. Engibou","doi":"10.1109/VLSID.1996.10019","DOIUrl":"https://doi.org/10.1109/VLSID.1996.10019","url":null,"abstract":"","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129735963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Mobile Communications: Demands on VLSI Technology, Design and CAD 移动通信:对VLSI技术、设计和CAD的需求
VLSI design (Print) Pub Date : 1900-01-01 DOI: 10.1109/VLSID.1996.10016
A. Chandrakasan, K. Keutzer, A. Khandekar, S. Maskara, B. D. Pradhan, M. Srivastava
{"title":"Mobile Communications: Demands on VLSI Technology, Design and CAD","authors":"A. Chandrakasan, K. Keutzer, A. Khandekar, S. Maskara, B. D. Pradhan, M. Srivastava","doi":"10.1109/VLSID.1996.10016","DOIUrl":"https://doi.org/10.1109/VLSID.1996.10016","url":null,"abstract":"Low-power wireless system design requires optimization at all levels of the design abstraction. Sub-1V operation is the key to lowpower design and requires modification of the process technology (e.g., multiple threshold devices, variable threshold devices using bulk biasing or dual-gate SO1 technology, etc.), circuit optimization, and architecture optimization. The CAD tool requirements for these new technologies will be discussed. High-efficiency DC-DC converters are critical for low-voltage and low (and variable) current load operation. Architectural power estimation tools, which accurately model switching activity and interconnect, are the key to fast and efficient exploration of the design space. A systematic approach to low-power design can result in orders of magnitude power reduction.","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122035842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimization and Analysis Techniques for the Deep Submicron Regime 深亚微米区优化与分析技术
VLSI design (Print) Pub Date : 1900-01-01 DOI: 10.1109/VLSID.2001.10019
N. Menezes, S. Sapatnekar
{"title":"Optimization and Analysis Techniques for the Deep Submicron Regime","authors":"N. Menezes, S. Sapatnekar","doi":"10.1109/VLSID.2001.10019","DOIUrl":"https://doi.org/10.1109/VLSID.2001.10019","url":null,"abstract":"Scaling in the deep submicron (DSM) regime has fundamentally altered the primary issues affecting VLSI design. The emergence of DSM-related problems has resulted in a proliferation of design techniques that attempt to alleviate these newer effects in current flows. However, future design methodologies would be required to undergo a paradigm shift to comprehensively address these problems. A few of these newer problems are listed below:","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127062189","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Embedded Memories in System Design: Technology, Application, Design and Tools 系统设计中的嵌入式存储器:技术、应用、设计和工具
VLSI design (Print) Pub Date : 1900-01-01 DOI: 10.1109/VLSID.2001.10005
D. Keitel-Schulz, N. Wehn, F. Catthoor, P. Panda
{"title":"Embedded Memories in System Design: Technology, Application, Design and Tools","authors":"D. Keitel-Schulz, N. Wehn, F. Catthoor, P. Panda","doi":"10.1109/VLSID.2001.10005","DOIUrl":"https://doi.org/10.1109/VLSID.2001.10005","url":null,"abstract":"First, background will be provided on embedded DRAM process, circuit and market issues. The term system-on-silicon has been used to denote the integration of random logic, processor cores, SRAMs, ROMs, and analog components on the same die. But up to recently, one major component had been missing: high-density DRAMs. Today's technologies allow the integration of significant amounts of DRAM memory for applications such as data buffering, picture storage, and program/data storage. In quarter-micron technology, chips with up to 128 Mbit of DRAM and 500 kgates of logic are eminently feasible. This enlarges the system design space tremendously since system architects are no more restricted to standard commodity DRAMs. We will discuss the market for embedded DRAM applications as well as the associated challenges.","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116998396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信