{"title":"DSP-The Real Time Technology for the New Millennium","authors":"John Scarisbric","doi":"10.1109/VLSID.2000.10013","DOIUrl":"https://doi.org/10.1109/VLSID.2000.10013","url":null,"abstract":"","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123930627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Low Power Design","authors":"Kaushik Roy, Rabindra K. Roy","doi":"10.1109/VLSID.1996.10002","DOIUrl":"https://doi.org/10.1109/VLSID.1996.10002","url":null,"abstract":"","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132585781","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Phase Change Memory Faults","authors":"M. Kumar, A. Orouji","doi":"10.1109/VLSID.2006.134","DOIUrl":"https://doi.org/10.1109/VLSID.2006.134","url":null,"abstract":"Chalcogenide based phase change memory (PCM) is a promising type of non-volatile memory that possibly replace the currently wide spread flash memory. Current research on PCMs targets the integration, feasibility, and reliability of such memory technology into the widely used CMOS process technology. Such studies identified special failure modes, known as disturbs, that could occur in PCMs. In this paper, we identify these failures and analyze their defective behaviors. Moreover, we develop fault models for such disturbs in addition to faults caused by opens and shorts in the core memory cell. Further, we propose an efficient test algorithm, called March-PC, to detect all faults discussed in this work.","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117318551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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