V. Ranganatha, R. Sunda
{"title":"System Level Testability Issues of Core Based System-on-a-Chip","authors":"V. Ranganatha, R. Sunda","doi":"10.1109/VLSID.2001.10017","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI design (Print)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSID.2001.10017","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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