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2018 International Symposium on Devices, Circuits and Systems (ISDCS)最新文献

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High speed and low power preset-able modified TSPC D flip-flop design and performance comparison with TSPC D flip-flop 高速低功耗可调改进型TSPC D触发器设计及与TSPC D触发器的性能比较
2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379677
J. Shaikh, H. Rahaman
{"title":"High speed and low power preset-able modified TSPC D flip-flop design and performance comparison with TSPC D flip-flop","authors":"J. Shaikh, H. Rahaman","doi":"10.1109/ISDCS.2018.8379677","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379677","url":null,"abstract":"Positron emission tomography (PET) is a nuclear functional imaging technique that produces a three-dimensional image of functional organs in the body. PET requires high resolution, fast and low power multichannel analog to digital converter (ADC). A typical multichannel ADC for PET scanner architecture consists of several blocks. Most of the blocks can be designed by using fast, low power D flip-flops. A preset-able true single phase clocked (TSPC) D flip-flop shows numerous glitches (noise) at the output due to unnecessary toggling at the intermediate nodes. Preset-able modified TSPC (MTSPC) D flip-flop have been proposed as an alternative solution to alleviate this problem. However, the MTSPC D flip-flop requires one extra PMOS to suspend toggling of the intermediate nodes. In this work, we designed a 7-bit preset-able gray code counter by using the proposed D flip-flop. This work involves UMC 180 nm CMOS technology for preset-able 7-bit gray code counter where we achieved 1 GHz maximum operation frequency with most significant bit (MSB) delay 0.96 ns, power consumption 244.2 μW (micro watt) and power delay product (PDP) 0.23 pJ (Pico joule) from 1.8 V power supply.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123722300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
Machine learning algorithm for autonomous control of walking robot 行走机器人自主控制的机器学习算法
2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379644
S. Bhattacharya, S. Dutta, T. Maiti, M. Miura-Mattausch, D. Navarro, H. Mattausch
{"title":"Machine learning algorithm for autonomous control of walking robot","authors":"S. Bhattacharya, S. Dutta, T. Maiti, M. Miura-Mattausch, D. Navarro, H. Mattausch","doi":"10.1109/ISDCS.2018.8379644","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379644","url":null,"abstract":"This work presents our development of autonomous walking robot control using machine learning algorithm. We have investigated sensor driven walking robot movement to develop supervised learning based control algorithm using neural network methods. We used robots hardware data such as pressure sensor data for accurate neural network (NN) classification. The analyzed result shows that ∼25–30 numbers of hidden neurons will perform the best result in terms of mean square error (mse), error-gradient, learning time and regression for small scale data analysis. The analyzed results are useful for next generation FPGA based artificial intelligence (AI) chip development for robot movement control.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"379 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122783231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Energy band-structure estimation of semiconductor nanotubes with consideration of momentum space quantization 考虑动量空间量化的半导体纳米管能带结构估计
2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379630
Subhrajit Sikdar, S. Chattopadhyay, B. N. Chowdhury
{"title":"Energy band-structure estimation of semiconductor nanotubes with consideration of momentum space quantization","authors":"Subhrajit Sikdar, S. Chattopadhyay, B. N. Chowdhury","doi":"10.1109/ISDCS.2018.8379630","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379630","url":null,"abstract":"In the current work, the effect of quantum confinement in the band structure of semiconductor nanotubes is investigated. The confinement of electrons in the momentum space is incorporated in sp3s∗ model to determine band structure of the nanotubes. The spherically symmetric r-point of nanotube energy bands is observed to split into cylindrically symmetric r′ and spherically symmetric r″ points due to confinement in transverse directions. Such splitting of r-point leads to increase the band gap ofnanotubes which further increases to a large extent with the decrease of nanotube core diameter and wall thickness. Such semiconductor nanotubes exhibit novel properties which can be exploited for developing novel quantum electronic devices.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"52 28","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131604514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Performance prediction of SOI FinFETs in the presence of random discrete dopants 随机离散掺杂剂存在下SOI finfet的性能预测
2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379640
S. Dey, Tara Prasanna Dash, S. Das, C. K. Maiti
{"title":"Performance prediction of SOI FinFETs in the presence of random discrete dopants","authors":"S. Dey, Tara Prasanna Dash, S. Das, C. K. Maiti","doi":"10.1109/ISDCS.2018.8379640","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379640","url":null,"abstract":"The position dependent discrete dopants (in the source/drain region of the channel) play a vital role in determining the performance of SOI FinFETs. In this work, the impact of random discrete dopants in SOI FinFETs has been investigated using a predictive simulation tool. A three-dimensional drift diffusion and density gradient approximation is employed for studying the device parameter variation due to discrete random dopant location and number fluctuations, a dominant source of statistical variability in nanoscale MOSFETs. The effects of random discrete dopants on Ion, Ioff, subthreshold slope (SS), and threshold voltage have been investigated.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123004099","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Compact modeling of advanced Si-IGBT for circuit design 用于电路设计的先进Si-IGBT的紧凑建模
2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379639
Takao Yamamoto, Y. Fukunaga, D. Ikoma, Y. Miyaoku, M. Miura-Mattausch
{"title":"Compact modeling of advanced Si-IGBT for circuit design","authors":"Takao Yamamoto, Y. Fukunaga, D. Ikoma, Y. Miyaoku, M. Miura-Mattausch","doi":"10.1109/ISDCS.2018.8379639","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379639","url":null,"abstract":"A physics-based compact model of insulated-gate bipolar transistors (IGBTs) models is presented. The IGBT structure consisting of a MOSFET and a bipolar parts, has been developed to realize low power loss circuits. Modeling new phenomena observed specific for IGBT is important for high precision circuit design. HiSIM_IGBT is the first compact model developed for real industrial applications. The model has been expended for two IGBT descendants, the Injection-Enhanced insulated-gate bipolar transistor (IEGT), and Partially-Narrow-Mesa (PNM) IGBT. The structures have been developed to provide solutions for two contradictory requirements. Modeling approach of the both, structures are presented here. Evolution of the power electronics will be reviewed together.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126365323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Performance analysis of 2 dimensional AIN nMOS transistor with NEGF simulations 用NEGF模拟分析二维AIN nMOS晶体管的性能
2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-01 DOI: 10.1109/ISDCS.2018.8379670
Lopamudra Baneijee, A. Sengupta, Hafizur Rahman
{"title":"Performance analysis of 2 dimensional AIN nMOS transistor with NEGF simulations","authors":"Lopamudra Baneijee, A. Sengupta, Hafizur Rahman","doi":"10.1109/ISDCS.2018.8379670","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379670","url":null,"abstract":"Recent focus of the VLSI industry has been on performance enhancement of semiconductors by introducing alternate channel materials. In this work, we have studied electronic properties of 2 dimensional hexagonal shaped aluminum nitride (2D h-AIN) as a channel material in n-MOS transistor. With Density Functional Theory (DFT), we have calculated 2D h-AIN to understand it's electronic properties and carried out non-equilibrium Green's function (NEGF) simulations to study device performance. Our studies reveal good MOS device properties in terms of drain current (86.45 (μA/μm), transconductance (296 (iS/jim) and ON/OFF ratio (1.57 × 104), which enhances the scope of further research on 2D h-AIN FET.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116013356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Film thickness dependent photovoltaic performance investigation of p-CuO/n-Si heterojunctions grown by chemical bath deposition process 化学浴沉积法生长p-CuO/n-Si异质结薄膜厚度依赖性光伏性能研究
2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-01 DOI: 10.1109/ISDCS.2018.8379668
J. Sultana, S. Paul, Sansthita Chowdhury, A. Karmakar, S. Chattopadhyay
{"title":"Film thickness dependent photovoltaic performance investigation of p-CuO/n-Si heterojunctions grown by chemical bath deposition process","authors":"J. Sultana, S. Paul, Sansthita Chowdhury, A. Karmakar, S. Chattopadhyay","doi":"10.1109/ISDCS.2018.8379668","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379668","url":null,"abstract":"Thin films of cupric oxide (p-CuO) are grown on silicon (n-Si) substrates by using chemical bath deposition (CBD) technique and the thickness is varied in the range of 60 nm to 178 nm by varying the deposition time. The chemical composition and photovoltaic properties of the grown films are observed to depend significantly on their thickness. FESEM, EDAX and ellipsometric measurements have been conducted to investigate such thickness dependent chemical composition and structural variation in detail. Also, the impact of thickness variation of CuO films on the performance of p-CuO/n-Si heterojunction solar cells has been studied by measuring its short-circuit current density (JSC), open-circuit voltage (VOC), fill-factor (FF) and efficiency (n). The 10-min CBD grown thin film of p-CuO with 110 nm average thickness on n-Si substrate provides the optimal photovoltaic performance. The study suggests a technological route for developing high quality CuO thin film for photovoltaic applications by employing chemical bath deposition method with appropriate active layer thickness.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123919454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
All optical implementation of universal shift-register using terahertz optical asymmetric de-multiplexer based Optical Devices 全光实现通用移位寄存器使用太赫兹光不对称解复用器基于光学器件
2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-01 DOI: 10.1109/ISDCS.2018.8379659
Rakesh Das, A. Bhattacharjee, L. Biswal, Chandan Bandyopadhyay, H. Rahaman
{"title":"All optical implementation of universal shift-register using terahertz optical asymmetric de-multiplexer based Optical Devices","authors":"Rakesh Das, A. Bhattacharjee, L. Biswal, Chandan Bandyopadhyay, H. Rahaman","doi":"10.1109/ISDCS.2018.8379659","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379659","url":null,"abstract":"Nowadays, the research on design of optical circuits and devices has received wide attention among the researchers due to ultra-high speed and low-power consumption properties in the optical devices and interconnects. In this conjuncture, optical design of combinational and sequential elements is given the great priorities in optical circuit research arena. Previously, we have investigated how to design optical memory elements with minimum optical components. Here, we propose optical implementation of universal shift register. The design is made using Terahertz Optical Asymmetric Demultiplexer(TOAD)based optical devices. Our proposed design is the generalized one as it includes all the behavior of four typical shift registers. To reduce the design complexity, we have used minimum numbers of TOADs, beam combiners and beam splitters and also our design confirms zero overhead in terms of number of ancilla inputs and garbage outputs.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128044648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
All optical design of hybrid adder circuit using terahertz optical asymmetric demultiplexer 采用太赫兹光非对称解复用器的混合加法器电路的全光设计
2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-01 DOI: 10.1109/ISDCS.2018.8379631
Subham Saha, Arpan Manna, Chandan Bandyopadhyay, H. Rahaman
{"title":"All optical design of hybrid adder circuit using terahertz optical asymmetric demultiplexer","authors":"Subham Saha, Arpan Manna, Chandan Bandyopadhyay, H. Rahaman","doi":"10.1109/ISDCS.2018.8379631","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379631","url":null,"abstract":"In this work we present the optical domain implementation of an n-bit hybrid adder circuit using terahertz optical asymmetric demultiplexer (TOAD). The work is completed in two phases. In initial phase, we show the naïve design of TOAD based circuit for ripple carry and carry look ahead adder and then in the final phase the design has been improved by taking optical cost and delay into account. The presented theoretical model promises both higher processing speed and accuracy. From the experimental verification we have seen that the proposed model not only has enhanced the cost of the design but also has reduced overall delay of the design. For fair analysis, we have compared the incurred design cost metrics with related work results, where a considerable improvement in our proposed design model is registered.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"147 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133869027","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Chemical bath deposited n-ZnO nanostructures on p-Si substrate for photo-detecting applications: Impact of annealing temperature 化学浴沉积在p-Si衬底上的n-ZnO纳米结构的光探测应用:退火温度的影响
2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-01 DOI: 10.1109/ISDCS.2018.8379662
S. Paul, J. Sultana, A. Sarkar, A. Karmakar, S. Chattopadhyay
{"title":"Chemical bath deposited n-ZnO nanostructures on p-Si substrate for photo-detecting applications: Impact of annealing temperature","authors":"S. Paul, J. Sultana, A. Sarkar, A. Karmakar, S. Chattopadhyay","doi":"10.1109/ISDCS.2018.8379662","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379662","url":null,"abstract":"In this current work, the zinc oxide (ZnO) nanostructures are grown by employing chemical bath deposition (CBD) method. The as grown samples are annealed at 400°C and 600°C for 30 min in argon environment. A comparative study has been performed to study the systematic change of nanostructure morphology, chemical composition, crystallite structure and photo-sensing effects due to thermal annealing of the CBD grown ZnO nanostructure. The 400°C annealed sample exhibit nanosphere structure with significant enhancement in photo responsivity under UV illumination of 13mW/cm2 at 365 nm. The present study suggests that the responsivity of the CBD grown ZnO nanostructure can be improved by thermal annealing at 400°C.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131631595","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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