2018 International Symposium on Devices, Circuits and Systems (ISDCS)最新文献

A machine learning approach for choosing component level conditions for prognostics of AMS systems 为AMS系统预测选择组件级条件的机器学习方法

2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379641

Sayandeep Sanyal, Antara Ai, P. Dasgupta

引用次数: 0

High gain DC-DC step-up converter with multilevel output voltage 具有多电平输出电压的高增益DC-DC升压变换器

2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379657

Arnab Ghosh, S. Saran

{"title":"High gain DC-DC step-up converter with multilevel output voltage","authors":"Arnab Ghosh, S. Saran","doi":"10.1109/ISDCS.2018.8379657","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379657","url":null,"abstract":"In this paper a very high gain step up DC-DC converter of multilevel output voltage is proposed. Maximum voltage gain in conventional Boost converter like, switched inductor converter, cascaded Boost converter, switched capacitor converter etc. are limited due to extreme duty cycle (i.e. duty cycle near to unity). Operation at extreme duty cycle leads to, serious reverse recovery problem at the switches, high conduction losses, high electromagnetic interference etc. Isolated converter such as fly-back converter, push-pull converter, forward converter, bridge converters etc. overcomes the above issues, where basically a transformer or coupled inductor is used to Boost the voltage. But, inclusion of transformer or coupled inductor introduces voltage spike at the main switch and power loss due to leakage inductance. Recently, DC micro-grid gets major importance because of the significant increase in DC loads and demand of high quality power. These DC loads require different voltage levels based on their power ratings. Photo voltaic source (PV) is one of the prime source of energy in DC micro-grid. A very high voltage gain converter is the need for DC micro-grid because of low PV source voltage. In this regard, here a step up DC-DC converter topology is proposed, which possess a very high voltage gain characteristic. The proposed converter operates in continuous conduction mode.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125198906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 19

Investigation of process induced stress in the channel of a SiGe embedded source/drain Ge-FinFET architecture SiGe嵌入式源/漏极Ge-FinFET结构通道中工艺诱发应力的研究

2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379632

K. Sinha, S. Chattopadhyay, H. Rahaman

{"title":"Investigation of process induced stress in the channel of a SiGe embedded source/drain Ge-FinFET architecture","authors":"K. Sinha, S. Chattopadhyay, H. Rahaman","doi":"10.1109/ISDCS.2018.8379632","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379632","url":null,"abstract":"In this work, a Ge Fin channel Field Effect Transistor (FinFET) with Silicon-Germanium (SiGe) embedded source/drain region has been studied using Sentaurus Technology Computer Aided Design (TCAD) process and device simulator from Synopsys and the impact of SiGe stressor material induced channel stress on the device performance has been investigated thoroughly. It is found that the SiGe embedded source/drain regions induce tensile stress in the channel that helps to improve the n-channel device performance. The amount of induced channel stress has been found to depend on the relative dimensions of the gate, source/drain, and Fin channel regions. A significant improvement of channel stress and hence the device performance, in terms of drive current (Ion) and Ion/Ioff ratio, is observed for higher source/drain volume and thinner Fin width device structure due to the enhancement of electron mobility by the induced stress, indicating better performance of the transistor. Also, more than 3× drive current improvement compared to unstrained device has been achieved for 25% Ge content in the SiGe stressor material.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132717737","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Selective molecular sieving by tailoring the etch hole dimensions of rGO in rGO-ZnO nanotubes based hybrid structure 在rGO- zno纳米管杂化结构中，通过调整rGO的蚀刻孔尺寸进行选择性分子筛分

2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379679

I. Maity, D. Acharyya, P. Bhattacharyya

{"title":"Selective molecular sieving by tailoring the etch hole dimensions of rGO in rGO-ZnO nanotubes based hybrid structure","authors":"I. Maity, D. Acharyya, P. Bhattacharyya","doi":"10.1109/ISDCS.2018.8379679","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379679","url":null,"abstract":"The present paper concerns the selectivity improvement of the gas sensor devices by incorporating the molecular sieving effect through tailoring the dimensions and numbers of etch holes in the reduced graphene oxide (rGO) layer of rGO-ZnO nanotubes based hybrid device structure. The etch holes on rGO layer act as an effective molecular sieve, where target vapor having larger molecular size can't penetrate through the etch holes. Thus, the numbers and dimensions of etch holes were tailored in rGO-ZnO NTs based hybrid structure by tuning the reduction temperature of rGO. Two types of binary hybrid devices viz. sample 1 (treated at 200°C temperature) and sample 2 (treated at 400°C temperature) were investigated. Consequently, for proof of concept, two different alcohols vapors (i.e. methanol and ethanol) having different molecular size, were used as a test species. The experimental results confirms that, for smaller etch hole dimensions, the nanoscale perforation of rGO excludes larger molecules but allows smaller molecules to pass through it and thus can act as a molecular sieve.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133137637","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

MOSFET optimization toward power efficient circuit design 面向功率高效电路设计的MOSFET优化

2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379642

A. Mukhopadhyay, S. Bhattacharya, T. Iizuka, T. Maiti, M. Miura-Mattausch, A. Gau, D. Navarro, H. Rahaman, A. Sengupta, S. Yoshitomi, H. Mattausch

引用次数: 1

A new method for denoising ECG signal using sharp cut-off FIR filter 提出了一种利用FIR滤波器对心电信号进行去噪的新方法

2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379647

Subhabrata Roy, A. Chandra

引用次数: 6

Comparison study on the basis of transient response between Voltage Mode Control (VMC) & Current Mode Control (CMC) of buck converter 基于电压模式控制与电流模式控制的降压变换器暂态响应比较研究

2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379636

Pratik Roy, K. Banerjee, Shilpi Saha

引用次数: 5

Morphological evolution of MnO2 based nanostructures by tuning the reaction time 调整反应时间对二氧化锰基纳米结构形貌的影响

2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379628

R. Roychaudhuri, D. Acharyya, P. Bhattacharyya

{"title":"Morphological evolution of MnO2 based nanostructures by tuning the reaction time","authors":"R. Roychaudhuri, D. Acharyya, P. Bhattacharyya","doi":"10.1109/ISDCS.2018.8379628","DOIUrl":"https://doi.org/10.1109/ISDCS.2018.8379628","url":null,"abstract":"The present paper illustrates a morphological evolution of Manganese dioxide (MnO2) nanostructures by varying the reaction time of hydrothermal process. To establish the morphological evolution, three samples were synthesized for three different reaction times (3 hrs, 5 hrs, and 7 hrs). Morphological characterizations of the synthesized nanostructures were performed using FESEM. Further, Raman spectra are presented to validate the crystal structure of the different nanostructures. It is evident from the FESEM images that microsphere/nanosheets based hierarchical structures, nanosheets intertwined with nanorods, and, nanorods based urchin like nanostructures were obtained by tuning the hydrothermal reaction time to 3 hrs, 5 hrs, and 7 hrs, respectively. The underlying morphological evolution mechanism is discussed and correlated with the characterization results. Moreover, three planar devices (based on microsphere/ nanosheets based hierarchical structures, nanosheets intertwined with nanorods, and nanorods based urchin like nanostructures) were fabricated by taking electrical contacts from top of the nanostructure layer and subsequently the device resistances were measured. Further, the electrical characterization finding is correlated with the material characterization results of the synthesized nanostructures for the three samples.","PeriodicalId":374239,"journal":{"name":"2018 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131523789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Effects of trap position and number dependence of threshold voltage in p-MOSFETs p- mosfet中陷阱位置和阈值电压数目依赖性的影响

2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379637

S. Das, Tara Prasanna Dash, S. Dey, C. K. Maiti

引用次数: 0

A predictive model to investigate the effects of gate driver common mode currents in SiC MOSFET based converter 基于SiC MOSFET的变换器中栅极驱动共模电流影响的预测模型

2018 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2018-03-29 DOI: 10.1109/ISDCS.2018.8379648

M. Krishna, K. Hatua

引用次数: 1