L. Montès, T. Baron, B. De Salvo, S. Ferraton, J. Zimmermann, J. Gautier
{"title":"Characterization and modelling of nano-crystals for single electron memory point devices","authors":"L. Montès, T. Baron, B. De Salvo, S. Ferraton, J. Zimmermann, J. Gautier","doi":"10.1109/ICM.2001.997481","DOIUrl":"https://doi.org/10.1109/ICM.2001.997481","url":null,"abstract":"This paper presents some experimental results and a simple model for the study of capacitors containing silicon dots in silicon dioxide to be integrated in a new generation of nonvolatile single electron memories. This work is essential for the stabilisation of the technology to be used in the future for these devices aimed at very high memory arrays.","PeriodicalId":360389,"journal":{"name":"ICM 2001 Proceedings. The 13th International Conference on Microelectronics.","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126009884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and verification of an ATM Knockout switch concentrator","authors":"Jianping Lu, S. Tahar","doi":"10.1109/ICM.2001.997660","DOIUrl":"https://doi.org/10.1109/ICM.2001.997660","url":null,"abstract":"In this paper we describe the design and verification of the concentrator of a Knockout ATM (Asynchronous Transfer Mode) switch fabric using the VIS tool. The Knockout is a popular ATM switch fabric which has application in both datagram and virtual circuit packet networks. The concentrator is the most difficult component in the Knockout ATM switch fabric. We developed an RTL structural design as well as a higher-level behavioral model of the Knockout switch concentrator in Verilog HDL. We then used equivalence checking within VIS to verify the concentrator structure against its behavioral model. While sequential equivalence checking failed, we succeeded the combinational equivalence checking of a latch-reduced model of the concentrator.","PeriodicalId":360389,"journal":{"name":"ICM 2001 Proceedings. The 13th International Conference on Microelectronics.","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130044206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Communication graph and timing configuration for virtual components","authors":"I. Bennour, O. Bouraoul, R. Tourki","doi":"10.1109/ICM.2001.997656","DOIUrl":"https://doi.org/10.1109/ICM.2001.997656","url":null,"abstract":"SOC design requires connecting and integrating intellectual property (IP) and virtual components (VC) from various sources. Among factors limiting IP reuse is their communications and interface incompatibility. IP integrators do not need to know and to understand how an IP is implemented, but they need a simple model describing its communication behavior, in addition to physical interface spec and timing diagrams. In the first part of this paper, we present a graph model to describe the communication behavior of a component including its timing constraints and flexibility. This model abstracts the functionality of the component and its implementation. In the second part, we present a method for timing analysis and configuration based on the communication behavior graph.","PeriodicalId":360389,"journal":{"name":"ICM 2001 Proceedings. The 13th International Conference on Microelectronics.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130127990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"New method for determination of drain saturation voltage in submicrometer MOSFETs between liquid helium to room temperature","authors":"Y. Amhouche, A. El abbassi, K. Rais, R. Rmaily","doi":"10.1109/ICM.2001.997487","DOIUrl":"https://doi.org/10.1109/ICM.2001.997487","url":null,"abstract":"A new method for drain saturation voltage extraction in submicron MOSFETs is presented. It is based on measurements of the partial derivative of the impact ionization rate. The method has been tested using different channel length MOSFET devices and compared with other methods.","PeriodicalId":360389,"journal":{"name":"ICM 2001 Proceedings. The 13th International Conference on Microelectronics.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128860220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling of the threshold voltage variation for a stressed submicronic MOSFET","authors":"A. Bouhdada, R. Marrakh","doi":"10.1109/ICM.2001.997478","DOIUrl":"https://doi.org/10.1109/ICM.2001.997478","url":null,"abstract":"A threshold voltage model for stressed submicron NMOS transistors is proposed. Stress conditions are chosen in a manner such that the interface states generated by hot electron injection at the Si-SiO/sub 2/ interface are dominant. The stress-generated defects vary with time. They are simulated by a spatial and temporal Gaussian distribution centered close to the extremity of the channel near the drain. The Gaussian parameters (standard deviation and maximum) vary according to the stress. Calculating the minimum surface potential by solving the two dimensional Poisson's equation (2-D) and taking into account the defect distribution evolution during stress time, the model is derived. Simulation results of threshold voltage are compared with experimental data to verify the validity of the modeling. The fitting parameters of the experimental results by the simulation curves allow us to obtain interesting information about the amount and distribution of charge injected at the Si-SiO/sub 2/ interface.","PeriodicalId":360389,"journal":{"name":"ICM 2001 Proceedings. The 13th International Conference on Microelectronics.","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114795261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"HDL-A based modeling of a current mode ADC","authors":"R. Maghrebi, N. Gueddah, M. Masmoudi","doi":"10.1109/ICM.2001.997503","DOIUrl":"https://doi.org/10.1109/ICM.2001.997503","url":null,"abstract":"Mixed-mode simulations are increasingly recognized as useful methods for the validation of mixed-signal circuits before going on fabrication. HDL-A is one of the useful hardware description language devoted for analog and mixed-signal circuits. This paper attempts to validate the conversion algorithm of a multi-slope self-calibrated analog-to-digital converter by means of HDL-A. We show, for the analog part of the structure, the agreement between modeling and experimental results.","PeriodicalId":360389,"journal":{"name":"ICM 2001 Proceedings. The 13th International Conference on Microelectronics.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129346614","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 3.3 V high-resolution sigma-delta modulator for digital audio","authors":"M. Yavari, O. Shoaei","doi":"10.1109/ICM.2001.997504","DOIUrl":"https://doi.org/10.1109/ICM.2001.997504","url":null,"abstract":"This paper discusses the architecture and circuit requirements for a CMOS sigma-delta modulator that provides digital audio performance. The performance objective is to achieve a dynamic range of 110 dB (18-bit resolution) for a 25 kHz signal bandwidth while operating from a single 3.3 V power supply.","PeriodicalId":360389,"journal":{"name":"ICM 2001 Proceedings. The 13th International Conference on Microelectronics.","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132186693","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A polynomial division pipelined architecture for CRC error detecting codes","authors":"F. Monteiro, A. Dandache, A. M'sir, B. Lepley","doi":"10.1109/ICM.2001.997505","DOIUrl":"https://doi.org/10.1109/ICM.2001.997505","url":null,"abstract":"Error detection in telecommunication applications is frequently ensured with CRC (Cyclic Redundancy Checking). However, the evolution towards increasing data rates increases the need for more and more sophisticated implementations. In this paper, we present an effective architecture for the CRC function based on a pipelined implementation of the polynomial division. It improves very effectively the speed performance, allowing data rates from 1 Gbit/s to 4 Gbit/s on FPGA implementations, according to the parallelisation level (8 to 32 bit).","PeriodicalId":360389,"journal":{"name":"ICM 2001 Proceedings. The 13th International Conference on Microelectronics.","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133872853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"New current-mode all-pass configuration using CCCIIs","authors":"S. Minaei, O. Cicekoglu, H. Kuntman, S. Turkoz","doi":"10.1109/ICM.2001.997511","DOIUrl":"https://doi.org/10.1109/ICM.2001.997511","url":null,"abstract":"In this paper a new configuration for the realization of first-order current-mode all-pass filters with high output impedance is presented. It can realize first-order allpass filtering function using two current controlled conveyors (CCCIIs) connected to four RC one-port elements. Eight different realizations for the proposed configuration are given in tabular form, which exhibit identical transfer functions but differ in the number of passive components, component matching constraints, possibility of electronic gain adjustment and other properties. PSPICE simulation results are given to confirm the theoretical analysis.","PeriodicalId":360389,"journal":{"name":"ICM 2001 Proceedings. The 13th International Conference on Microelectronics.","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129292941","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fault detection in large AC machines","authors":"S. Foda, M. Abdel-Rahman, K. E. Addoweesh","doi":"10.1109/ICM.2001.997520","DOIUrl":"https://doi.org/10.1109/ICM.2001.997520","url":null,"abstract":"The emerging techniques of artificial neural networks (ANNs) are applied to the problem of developing an artificial neural system capable of detecting interlayer faults in large AC machines using line-end coil voltage measurements. The proposed ANN system is a two-layer back propagation neural network, which is basically a classifier capable of recognizing data vectors buried in noise. The developed ANN system is fast to train and produced reliable fault detection and localization with noisy measurements. Furthermore, the proposed system needs neither data pre-processing nor feature extraction networks.","PeriodicalId":360389,"journal":{"name":"ICM 2001 Proceedings. The 13th International Conference on Microelectronics.","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131605656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}