发布求助
文献互助 智能选刊 最新文献

2016 International Conference on Microelectronic Test Structures (ICMTS)最新文献

筛选
英文 中文
Interface trap density estimation in FinFETs from the subthreshold current 基于亚阈值电流的finfet界面陷阱密度估计
2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476199
J. Schmitz, B. Kaleli, P. Kuipers, N. van den Berg, S. Smits, R. Hueting
{"title":"Interface trap density estimation in FinFETs from the subthreshold current","authors":"J. Schmitz, B. Kaleli, P. Kuipers, N. van den Berg, S. Smits, R. Hueting","doi":"10.1109/ICMTS.2016.7476199","DOIUrl":"https://doi.org/10.1109/ICMTS.2016.7476199","url":null,"abstract":"In this work we present a measurement approach to determine the interface trap density in FinFETs as a function of their energy. It is based on the precise determination of the gate voltage dependent ideality factor of the subthreshold current in this device. The required measurement accuracy for temperature, drain current and transconductance is derived, and we propose an implementation for wafer-level device measurement on contemporary test set-ups. Exemplary interface trap distributions are shown as obtained from two FinFET device technologies, featuring the commonly observed bathtub shape.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116846707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Spring-constant measurement methods for RF-MEMS capacitive switches RF-MEMS电容开关的弹簧常数测量方法
2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476164
Jiahui Wang, J. Bielen, C. Salm, J. Schmitz
{"title":"Spring-constant measurement methods for RF-MEMS capacitive switches","authors":"Jiahui Wang, J. Bielen, C. Salm, J. Schmitz","doi":"10.1109/ICMTS.2016.7476164","DOIUrl":"https://doi.org/10.1109/ICMTS.2016.7476164","url":null,"abstract":"In this article we compare three approaches to measure the spring constant in RF MEMS capacitive switches. We use the lowest vibration mode, as obtained from vibrometry; the pull-in voltage; and the low-field capacitance-voltage curve of the device to extract the spring constant. Experimental results are presented for each approach, and FEM model predictions are used to further verify and interpret the findings. Pros and cons of each method are discussed.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130801385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Extraction of floating-gate capacitive parameters in split-gate flash memory cells 分栅闪存单元中浮栅电容参数的提取
2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476186
Y. Tkachev
{"title":"Extraction of floating-gate capacitive parameters in split-gate flash memory cells","authors":"Y. Tkachev","doi":"10.1109/ICMTS.2016.7476186","DOIUrl":"https://doi.org/10.1109/ICMTS.2016.7476186","url":null,"abstract":"A new fast and simple method for extraction of capacitive coupling coefficients in a split-gate flash memory cell is described. The method is based on the modulation of cell's erase characteristics by the bias applied to the gates during read and erase operations. The absolute values of the capacitance between the floating gate and other nodes are also extracted using the effect of modulation of cell conductance caused by the transfer of individual electrons to/from the floating gate.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125283323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Top-gated MoS2 capacitors and transistors with high-k dielectrics for interface study 用于界面研究的高k介电体的顶门控MoS2电容器和晶体管
2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476201
P. Zhao, A. Azcatl, Pavel Bolshakov-Barrett, R. Wallace, C. Young, P. Hurley
{"title":"Top-gated MoS2 capacitors and transistors with high-k dielectrics for interface study","authors":"P. Zhao, A. Azcatl, Pavel Bolshakov-Barrett, R. Wallace, C. Young, P. Hurley","doi":"10.1109/ICMTS.2016.7476201","DOIUrl":"https://doi.org/10.1109/ICMTS.2016.7476201","url":null,"abstract":"Top-gated MOS capacitors on bulk MoS2 and transistors of few-layer MoS2 were designed and fabricated. They can be potentially utilized on various TMD and high-k materials for fast and robust electrical characterization. The 3-terminal transistor test structure shows advantages of significant reduction of parasitic effects. C-V and I-V measurements were successfully conducted to characterize few-layer MoS2 transistors with sub-10 nm HfO2 dielectric.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133510986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
An efficient method to evaluate 4 million micro-bump interconnection resistances for 3D stacked 16-mpixel image sensor 一种评估3D堆叠1600万像素图像传感器400万个微碰撞互连电阻的有效方法
2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476162
Y. Takemoto, H. Kato, Torn Kondo, N. Takazawa, M. Tsukimura, H. Saito, Kenji Kobayashi, J. Aoki, S. Suzuki, Y. Gomi, S. Matsuda, Y. Tadaki
{"title":"An efficient method to evaluate 4 million micro-bump interconnection resistances for 3D stacked 16-mpixel image sensor","authors":"Y. Takemoto, H. Kato, Torn Kondo, N. Takazawa, M. Tsukimura, H. Saito, Kenji Kobayashi, J. Aoki, S. Suzuki, Y. Gomi, S. Matsuda, Y. Tadaki","doi":"10.1109/ICMTS.2016.7476162","DOIUrl":"https://doi.org/10.1109/ICMTS.2016.7476162","url":null,"abstract":"We developed an efficient method for evaluating the 4 million micro-bump interconnection resistances of the 3D stacked 16-Mpixel CMOS image sensor by including vertical scanning and readout circuits and extra circuits in both of two substrates for a resistance testing mode, which enables us not only to find failed bumps but also to evaluate the resistances by scanning all micro bumps. We measured the resistances of the interconnections ranging from 50 to 500 kΩ with a resolution of 50kΩ.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129995609","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Chip level characterisation studies of Ni and NiFe electrochemical deposition using test structures 用测试结构对Ni和NiFe电化学沉积的芯片级表征研究
2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476203
J. Murray, Richard Perry, J. Terry, Stewart Smith, Andrew R. Mount, Anthony J. Walton
{"title":"Chip level characterisation studies of Ni and NiFe electrochemical deposition using test structures","authors":"J. Murray, Richard Perry, J. Terry, Stewart Smith, Andrew R. Mount, Anthony J. Walton","doi":"10.1109/ICMTS.2016.7476203","DOIUrl":"https://doi.org/10.1109/ICMTS.2016.7476203","url":null,"abstract":"This paper describes the first use of test structure chips designed to characterise the fundamental properties of Ni and NiFe alloy films deposited using electroplating. This approach is used to perform a chip-level investigation into the effects of electrolyte bath composition on the characteristics of deposited Ni and NiFe layers. The advantage of this methodology is that each electrolyte change does not require the replacement of a 35 litre bath (which is necessary for wafer level investigations), thereby making each experiment far less time consuming, and considerably cheaper to perform.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131793229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Microfabricated test structures for thermal gas sensor 热气体传感器微加工测试结构
2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476165
M. Denoual, M. Pouliquen, D. Robbes, J. Grand, H. Awala, S. Mintova, O. de Sagazan, S. Inoue, A. Mita-Tixier, Y. Mita
{"title":"Microfabricated test structures for thermal gas sensor","authors":"M. Denoual, M. Pouliquen, D. Robbes, J. Grand, H. Awala, S. Mintova, O. de Sagazan, S. Inoue, A. Mita-Tixier, Y. Mita","doi":"10.1109/ICMTS.2016.7476165","DOIUrl":"https://doi.org/10.1109/ICMTS.2016.7476165","url":null,"abstract":"Microfabricated test structures are presented for the proof validation of a new chemical sensor concept. The proposed detection principle is based on time constant shift of a thermal device covered with zeolites when target species are adsorbed.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121362301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A high power curve tracer for characterizing full operational range of SiC power transistors 一种高功率曲线示踪器，用于表征SiC功率晶体管的全工作范围
2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476181
Yohei Nakamura, Michihiro Shintani, Takashi Sato, T. Hikihara
{"title":"A high power curve tracer for characterizing full operational range of SiC power transistors","authors":"Yohei Nakamura, Michihiro Shintani, Takashi Sato, T. Hikihara","doi":"10.1109/ICMTS.2016.7476181","DOIUrl":"https://doi.org/10.1109/ICMTS.2016.7476181","url":null,"abstract":"A curve tracer is proposed for measuring static characteristics of power devices at high voltage and large current range. Using a SiC-MOSFET as a switch for pulse-based measurement, high voltage tolerance and fast switching are simultaneously achieved. The proposed curve tracer facilitates current-voltage measurements for full I-V regions found in practical device operations. The measurement results provided by the proposed method contribute to build device models that can be used to design efficient power converters.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"228 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123295339","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Impact of a laser pulse on HfO2-based RRAM cells reliability and integrity 激光脉冲对hfo2基RRAM电池可靠性和完整性的影响
2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476196
A. Krakovinsky, M. Bocquet, R. Wacquez, J. Coignus, D. Deleruyelle, C. Djaou, G. Reimbold, J. Portal
{"title":"Impact of a laser pulse on HfO2-based RRAM cells reliability and integrity","authors":"A. Krakovinsky, M. Bocquet, R. Wacquez, J. Coignus, D. Deleruyelle, C. Djaou, G. Reimbold, J. Portal","doi":"10.1109/ICMTS.2016.7476196","DOIUrl":"https://doi.org/10.1109/ICMTS.2016.7476196","url":null,"abstract":"Several NVM technologies have emerged during the last 10 years. These technologies offer solutions for the replacement of the Flash technology, which is facing downsizing limits [1]. Moreover these solutions propose lower switching energy and faster operations compared to the state of the art for Flash, and thus, are seen as an opportunity for the rise of the IoT market. But one of the main concerns regarding IoT is the protection of the data. Contrary to Flash, security of the data in emerging NVM is yet to be evaluated. In order to verify capability of the technology in terms of data integrity, we propose to investigate reliability and integrity of HfO2-based Resistive RAM (OxRRAM). This paper details the experimental protocol defined for laser-based attacks, shows that a laser pulse can affect the information stored in a single OxRRAM bit. The occurring phenomenon is then explained by mean of thermal and electrical simulations.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130733573","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure 使用可寻址SRAM单元阵列测试结构测量PUF应用的SRAM上电状态
2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476191
K. Takeuchi, T. Mizutani, T. Saraya, M. Kobayashi, T. Hiramoto, H. Shinohara
{"title":"Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure","authors":"K. Takeuchi, T. Mizutani, T. Saraya, M. Kobayashi, T. Hiramoto, H. Shinohara","doi":"10.1109/ICMTS.2016.7476191","DOIUrl":"https://doi.org/10.1109/ICMTS.2016.7476191","url":null,"abstract":"SRAM data just after power-up were measured using an addressable SRAM cell array test structure. It was found that the results are strongly affected by the address switching noise and “memory effect”. An addressing sequence combined with word line reset pulse application is proposed for reliable power-up data stability evaluation.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129093420","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信