使用可寻址SRAM单元阵列测试结构测量PUF应用的SRAM上电状态

2016 International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2016-03-28 DOI:10.1109/ICMTS.2016.7476191

K. Takeuchi, T. Mizutani, T. Saraya, M. Kobayashi, T. Hiramoto, H. Shinohara

{"title":"使用可寻址SRAM单元阵列测试结构测量PUF应用的SRAM上电状态","authors":"K. Takeuchi, T. Mizutani, T. Saraya, M. Kobayashi, T. Hiramoto, H. Shinohara","doi":"10.1109/ICMTS.2016.7476191","DOIUrl":null,"url":null,"abstract":"SRAM data just after power-up were measured using an addressable SRAM cell array test structure. It was found that the results are strongly affected by the address switching noise and “memory effect”. An addressing sequence combined with word line reset pulse application is proposed for reliable power-up data stability evaluation.","PeriodicalId":344487,"journal":{"name":"2016 International Conference on Microelectronic Test Structures (ICMTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure\",\"authors\":\"K. Takeuchi, T. Mizutani, T. Saraya, M. Kobayashi, T. Hiramoto, H. Shinohara\",\"doi\":\"10.1109/ICMTS.2016.7476191\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"SRAM data just after power-up were measured using an addressable SRAM cell array test structure. It was found that the results are strongly affected by the address switching noise and “memory effect”. An addressing sequence combined with word line reset pulse application is proposed for reliable power-up data stability evaluation.\",\"PeriodicalId\":344487,\"journal\":{\"name\":\"2016 International Conference on Microelectronic Test Structures (ICMTS)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-03-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 International Conference on Microelectronic Test Structures (ICMTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMTS.2016.7476191\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on Microelectronic Test Structures (ICMTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.2016.7476191","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 8

摘要

上电后的SRAM数据使用可寻址SRAM单元阵列测试结构进行测量。结果发现，地址转换噪声和“记忆效应”对结果有很大影响。提出了一种结合字线复位脉冲应用的寻址序列，用于可靠的上电数据稳定性评估。

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Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure

SRAM data just after power-up were measured using an addressable SRAM cell array test structure. It was found that the results are strongly affected by the address switching noise and “memory effect”. An addressing sequence combined with word line reset pulse application is proposed for reliable power-up data stability evaluation.

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2016 International Conference on Microelectronic Test Structures (ICMTS)

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