P. Zhao, A. Azcatl, Pavel Bolshakov-Barrett, R. Wallace, C. Young, P. Hurley
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Top-gated MoS2 capacitors and transistors with high-k dielectrics for interface study
Top-gated MOS capacitors on bulk MoS2 and transistors of few-layer MoS2 were designed and fabricated. They can be potentially utilized on various TMD and high-k materials for fast and robust electrical characterization. The 3-terminal transistor test structure shows advantages of significant reduction of parasitic effects. C-V and I-V measurements were successfully conducted to characterize few-layer MoS2 transistors with sub-10 nm HfO2 dielectric.
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