2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)最新文献

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Wideband 2.5 GHz VCO with active inductance in a 0.25 µm CMOS technology 采用0.25µm CMOS技术,带有源电感的宽带2.5 GHz压控振荡器
A. Medjahdi, F. Calmon
{"title":"Wideband 2.5 GHz VCO with active inductance in a 0.25 µm CMOS technology","authors":"A. Medjahdi, F. Calmon","doi":"10.1109/ICECS.2009.5410792","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410792","url":null,"abstract":"We have designed a Voltage Controlled Oscillator (VCO) with a differential architecture containing two active inductance cells. This compact circuit (∼60×75 µm2) was realized in a 0.25 µm MOSFET technology. The oscillator can operate on a wide frequency band from 1.5 GHz up to 2.8 GHz adjustable by a tuning voltage between 0.6 V and 1.2 V. This oscillator has a static consumption of 13 mW (VCO core only) under 2.5 V supply voltage and presents a phase noise of −93 dBc/Hz @ 1MHz.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127700626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimum clock slope for flip-flops within a clock domain: Analysis and a case study 时钟域内触发器的最佳时钟斜率:分析和案例研究
M. Alioto, Elio Consoli, G. Palumbo
{"title":"Optimum clock slope for flip-flops within a clock domain: Analysis and a case study","authors":"M. Alioto, Elio Consoli, G. Palumbo","doi":"10.1109/ICECS.2009.5410993","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410993","url":null,"abstract":"In this paper, the impact of clock slope specification on the energy consumption of a clock domain is analyzed. Results show that the clock slope requirement can be relaxed at the cost of a very small speed penalty and energy increase in the flip-flops (FFs). On the other hand, relaxing the clock slope specification allows for downsizing the local buffers driving the FFs that belong to the same clock domain. From the energy point of view, an optimum clock slope is found that leads to energy savings of 30 ÷ 40% compared to the usually adopted clock slopes. The effectiveness of the clock slope optimization, including the impact on local skew/jitter sources, is discussed for the typical case of Master-Slave FFs by resorting to simulations on a 65-nm CMOS technology.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"219 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115973226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Adaptive multirate signal estimation with lattice orthogonalization 基于格正交化的自适应多速率信号估计
A. Tanc, E. Eksioglu, A. H. Kayran
{"title":"Adaptive multirate signal estimation with lattice orthogonalization","authors":"A. Tanc, E. Eksioglu, A. H. Kayran","doi":"10.1109/ICECS.2009.5410937","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410937","url":null,"abstract":"In this paper, we address the signal estimation problem in statistical multirate systems. We propose an adaptive least squares lattice filter which is sequential and periodically time varying (PTV) with the multirate system period. Furthermore, we consider the elimination of redundant mathematical operations due to sequential processing of multirate observations. Experimental results show that our multirate lattice filter is fast convergent and it has lower order computational complexity when compared with the transversal structure.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122434956","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Layout exploration of geometrically accurate arithmetic circuits 几何精确算术电路布局探索
K. Subramaniyan, E. Axelsson, P. Larsson-Edefors, M. Sheeran
{"title":"Layout exploration of geometrically accurate arithmetic circuits","authors":"K. Subramaniyan, E. Axelsson, P. Larsson-Edefors, M. Sheeran","doi":"10.1109/ICECS.2009.5410779","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410779","url":null,"abstract":"High-performance arithmetic circuits are critical to overall design performance and are therefore designed using full-custom design techniques. However, this is a time-consuming and error-prone task. We present a novel layout exploration methodology to design arithmetic circuits using standard-cell techniques, that retains competitive performance while allowing an almost custom-design kind of control over the layout. It uses an unconventional approach with a Haskell-based front-end in the Wired system, designed to produce logically and topologically accurate circuit descriptions and at the same time be parameterizable. Further, another overall goal of the system was to keep implementation time as low as possible. We demonstrate this methodology on HPM multipliers that exhibit a high degree of layout regularity.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122763235","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Real time hardware implementation of a new Duffing's chaotic attractor 一种新的Duffing混沌吸引子的实时硬件实现
S. Sadoudi, M. S. Azzaz, C. Tanougast, A. Dandache
{"title":"Real time hardware implementation of a new Duffing's chaotic attractor","authors":"S. Sadoudi, M. S. Azzaz, C. Tanougast, A. Dandache","doi":"10.1109/ICECS.2009.5410866","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410866","url":null,"abstract":"This paper proposes a new approach for real time FPGA implementation of a new chaotic generator characterized by a new three-scroll chaotic attractor. The originality of this chaotic generator is that is obtained with some bifurcation parameters of Duffing's chaotic oscillator. Our new chaotic attractor shows the richness chaotic behavior of the Duffing's oscillator. In addition, its hardware implementation using Virtex Xilinx FPGA technology is particularly attractive since it provides good performances in terms of throughput and resources cost required. This particularity allows lowing power consumption especially for embedded applications.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127253222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Novel linearizer for tangent/cotangent converter 新型正切/共切变换器线性化器
M. Benammar, M. Bagher, Mohamed Al Kaisi
{"title":"Novel linearizer for tangent/cotangent converter","authors":"M. Benammar, M. Bagher, Mohamed Al Kaisi","doi":"10.1109/ICECS.2009.5410864","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410864","url":null,"abstract":"Resolvers and other types of sinusoidal encoders provide electrical signals whose amplitudes are related to the sine and cosine of the mechanical shaft angle θ over the full 360° range. The tangent/cotangent converter, used with these transducers to extract θ from these signals, is based on the determination of a ratio between the absolute values of the sine and cosine signals. This produces highly non-linear output. In conventional converters, θ is determined from the output using a look up table or a processor. In this work, an analog shaping network is described for the linearization of this output and hence for linear determination of θ. The optimal break points positions of the shaping network are determined experimentally and automatically using a LabVIEW-based setup that seeks minimization of the overall absolute error of the converter. The absolute error was 0.14° over the full 360° range of input angle. The principle of operation, full circuit details, computer simulation and practical results are given.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125678287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Low-noise single-chip potentiostat for nano-bio-electrochemistry over a 1MHz bandwidth 用于纳米生物电化学的低噪声单芯片恒电位器,带宽为1MHz
M. Carminati, G. Ferrari, F. Guagliardo, Marco Farina, M. Sampietro
{"title":"Low-noise single-chip potentiostat for nano-bio-electrochemistry over a 1MHz bandwidth","authors":"M. Carminati, G. Ferrari, F. Guagliardo, Marco Farina, M. Sampietro","doi":"10.1109/ICECS.2009.5410819","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410819","url":null,"abstract":"A single-chip versatile potentiostat is presented that allows multiple amperometric electrochemical measurements at the nanoscale. Cyclic voltammetry, impedance spectroscopy, impedance time tracking and amperometry can be performed over a 1MHz bandwidth, with sub-pA resolution and over an unlimited measuring time. The design of the current amplifier, based on a simple transistor matching architecture, is illustrated. The results of the experimental characterization and of the validation electrochemical tests are discussed. The performances demonstrated, such as 3aFrms capacitance resolution with an applied 100kHz sinusoid of only 25mV, are suitable for electrochemical investigation at sub-micrometric electrodes, in particular for biotechnology applications.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125825615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A low power 0.13µm ADC for drift chambers 用于漂移室的低功耗0.13µm ADC
S. D’Amico, M. Matteis, F. Grancagnolo, M. Panareo, R. Perrino, G. Chiodini, A. Corvaglia, G. Cocciolo, A. Baschirotto
{"title":"A low power 0.13µm ADC for drift chambers","authors":"S. D’Amico, M. Matteis, F. Grancagnolo, M. Panareo, R. Perrino, G. Chiodini, A. Corvaglia, G. Cocciolo, A. Baschirotto","doi":"10.1109/ICECS.2009.5410904","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410904","url":null,"abstract":"In this paper a 6 bits, 1GSa/s flash ADC is presented. It is included in a front end for drift chambers. The front-end has been designed in a 0.13µm CMOS technology with 1.2V supply voltage. The single circuit blocks are described in detail. The ENOB is 5.86bits, while the overall power consumption is 58.1mA.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126716156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Development of aroma-Card based soundless Olfactory Display 基于香卡的无声嗅觉显示器的研制
D. Kim, Y. Cho, Kazushi Nishimoto, Y. Kawakami, S. Kunifuji, H. Ando
{"title":"Development of aroma-Card based soundless Olfactory Display","authors":"D. Kim, Y. Cho, Kazushi Nishimoto, Y. Kawakami, S. Kunifuji, H. Ando","doi":"10.1109/ICECS.2009.5410784","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410784","url":null,"abstract":"Previously, mechanical devices have been used for the controlled release of aroma molecules. Therefore, noise associated with the operation of the device could not be avoided, prior to every transmission of aroma information. Moreover, as the aroma source was located inside or in the bottom of the device, it had a problem of odor components adhering to the device structure. In this research, we focus on a chemical container of temperature responsive hydrogel, which can have reversible phase transition between sol and gel, and controlled release of aroma by using a peltier module to control the temperature. With this approach, a soundless olfactory display was achieved. In addition, we tried to solve the problem of odor component adhesion by arranging a card-based aroma source on the top of the olfactory display. Having evaluated the usability of the card-based olfactory display, we were able to confirm its effectiveness and efficiency.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"423 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117352791","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 31
A new simply-designed scalar quantizer adaptable for any distribution 一种新的设计简单的标量量化器,适用于任何分布
C. Diab, M. Oueidat
{"title":"A new simply-designed scalar quantizer adaptable for any distribution","authors":"C. Diab, M. Oueidat","doi":"10.1109/ICECS.2009.5410760","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410760","url":null,"abstract":"In this paper, we present a simple quantizer “Sub-optimal” that can be applied for any probability distribution. The principle and the calculation of this quantizer are detailed. Its implementation shows that this method achieves significant results compared with other quantizer in term of mean square error distortion.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"140 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127551771","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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