S. Sadoudi, M. S. Azzaz, C. Tanougast, A. Dandache
{"title":"Real time hardware implementation of a new Duffing's chaotic attractor","authors":"S. Sadoudi, M. S. Azzaz, C. Tanougast, A. Dandache","doi":"10.1109/ICECS.2009.5410866","DOIUrl":null,"url":null,"abstract":"This paper proposes a new approach for real time FPGA implementation of a new chaotic generator characterized by a new three-scroll chaotic attractor. The originality of this chaotic generator is that is obtained with some bifurcation parameters of Duffing's chaotic oscillator. Our new chaotic attractor shows the richness chaotic behavior of the Duffing's oscillator. In addition, its hardware implementation using Virtex Xilinx FPGA technology is particularly attractive since it provides good performances in terms of throughput and resources cost required. This particularity allows lowing power consumption especially for embedded applications.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2009.5410866","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
This paper proposes a new approach for real time FPGA implementation of a new chaotic generator characterized by a new three-scroll chaotic attractor. The originality of this chaotic generator is that is obtained with some bifurcation parameters of Duffing's chaotic oscillator. Our new chaotic attractor shows the richness chaotic behavior of the Duffing's oscillator. In addition, its hardware implementation using Virtex Xilinx FPGA technology is particularly attractive since it provides good performances in terms of throughput and resources cost required. This particularity allows lowing power consumption especially for embedded applications.