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Low power 4 x 5-Gb/s VCSEL driver array in 0.13-µm CMOS 低功耗4 × 5gb /s VCSEL驱动阵列，采用0.13µm CMOS
2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009) Pub Date : 2009-12-01 DOI: 10.1109/ICECS.2009.5410780
A. Phan, T. Cao
{"title":"Low power 4 x 5-Gb/s VCSEL driver array in 0.13-µm CMOS","authors":"A. Phan, T. Cao","doi":"10.1109/ICECS.2009.5410780","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410780","url":null,"abstract":"A 4-channel CMOS VCSEL driver array is implemented in 0.13-um CMOS technology. The optical transmitter drives a VCSEL laser diode, operating at 5-Gb/s with the proposed APC control to obtain constant and reliable optical output power. To enhance the bandwidth and ensure the input swing of the pre-amplifier, cascode amplifier is adopted. A single channel VCSEL driver achieves 10-dB voltage gain, 5-Gb/s operation with an average bandwidth of 5-GHz for 0.2-pF VCSEL capacitance. The driver dissipates only 22.7-mW from 1.2-V single supply. The active size is 1740 × 1500 µm2.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122536945","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Offset cancellation with subthreshold-operated feedback circuit for fully differential amplifiers 全差分放大器用次阈值操作反馈电路抵消偏置
2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009) Pub Date : 2009-12-01 DOI: 10.1109/ICECS.2009.5410959
T. Iida, T. Asai, E. Sano, Y. Amemiya
{"title":"Offset cancellation with subthreshold-operated feedback circuit for fully differential amplifiers","authors":"T. Iida, T. Asai, E. Sano, Y. Amemiya","doi":"10.1109/ICECS.2009.5410959","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410959","url":null,"abstract":"An offset cancellation technique for fully differential amplifiers is proposed. This technique uses subthreshold-operated operational amplifiers (subth-OP amps) for feedback biasing. Two subth-OP amps sense the two outputs of the differential amplifier and accordingly adjust the load currents in the amplifier to fix the outputs to a given reference voltage. The feedback operation is established only at dc and low frequencies because the subth-OP amps operate very slowly. The differential amplifier consequently operates as a high-pass filter and therefore shows no dc offset in its output, while it can normally amplify ac input signals. The results for the simulation and fabrication of the device are described.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127675708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
A case study of improving at-speed testing coverage of a gigahertz microprocessor 提高千兆赫微处理器高速测试覆盖率的案例研究
2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009) Pub Date : 2009-12-01 DOI: 10.1109/ICECS.2009.5410807
Zichu Qi, Hui Liu, Xiangku Li, Jun Xu, Weiwu Hu
{"title":"A case study of improving at-speed testing coverage of a gigahertz microprocessor","authors":"Zichu Qi, Hui Liu, Xiangku Li, Jun Xu, Weiwu Hu","doi":"10.1109/ICECS.2009.5410807","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410807","url":null,"abstract":"For a gigahertz microprocessor with multiple clock domains and a large amount of embedded RAMs (Random Access Memory), generating at-speed testing patterns is becoming very difficult and very time-consuming. This paper presents some novel techniques to improve at-speed testing coverage with low cost. These methods are major concern about preventing X states propagation, which include avoiding capturing X states for registers, sequential bypass of macros, clock control scheme for inter-clock domains and accurate analysis of exception paths in intra-clock domains. Functional patterns are utilized to further improve the efficiency of the at-speed testing. A novel optimal flow is presented by carefully selecting these techniques. By using the flow, 90% transition fault coverage is achieved. In addition, both the number of patterns and the test time of the transition test are decreased by 15%. The total area overhead is about a few hundreds of AND cells and has little timing impact on the critical paths.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128588464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Toward an optimal residual frame coding for DWT based video codec 基于小波变换的视频编解码器残差帧编码的优化研究
2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009) Pub Date : 2009-12-01 DOI: 10.1109/ICECS.2009.5410767
S. Cheikhrouhou, Y. Jemaa, A. Samet, M. A. B. Ayed, N. Masmoudi
{"title":"Toward an optimal residual frame coding for DWT based video codec","authors":"S. Cheikhrouhou, Y. Jemaa, A. Samet, M. A. B. Ayed, N. Masmoudi","doi":"10.1109/ICECS.2009.5410767","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410767","url":null,"abstract":"The widespread of video based applications in nowadays life has increased the need of video coding scalability. In fact, spatial scalability allows the adaptation of the bit-stream to end users as well as varying terminal capabilities and network conditions. In this context, many Discrete Wavelet Transform (DWT) based video codec are proposed. We can sort out that the well known integer to integer DWT such as 5/3 and 9/7-M filters do not perform well in coding the residual frames of the video in terms of PSNR.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"46 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129234795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
RTS noise impact in CMOS image sensors readout circuit RTS噪声对CMOS图像传感器读出电路的影响
2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009) Pub Date : 2009-12-01 DOI: 10.1109/ICECS.2009.5410825
P. Martin-Gonthier, P. Magnan
{"title":"RTS noise impact in CMOS image sensors readout circuit","authors":"P. Martin-Gonthier, P. Magnan","doi":"10.1109/ICECS.2009.5410825","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410825","url":null,"abstract":"CMOS image sensors are nowadays widely used in imaging applications even for high end applications. This is really possible thanks to a reduction of noise obtained, among others, by Correlated Double Sampling (CDS) readout. Random Telegraph Signal (RTS) noise has thus become an issue for low light level applications especially in the context of downscaling transistor dimension. This paper describes the analysis of in-pixel source follower transistor RTS noise filtering by CDS circuit. The measurement of a non Gaussian distribution with a positive skew of image sensor output noise is analysed and dimension (W and L) impact of the in-pixel source follower is analysed.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116765481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 43
Low-voltage CMOS voltage squarer 低压CMOS电压平方器
2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009) Pub Date : 2009-12-01 DOI: 10.1109/ICECS.2009.5410960
George Raikos, S. Vlassis
{"title":"Low-voltage CMOS voltage squarer","authors":"George Raikos, S. Vlassis","doi":"10.1109/ICECS.2009.5410960","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410960","url":null,"abstract":"A voltage squarer based on bulk-driven PMOS transistors is proposed in this paper. Circuit topology employs a voltage attenuator and the quadratic ID/VG characteristic of a MOS in saturation. The squarer was designed with a 0.8V supply voltage using standard 0.35um CMOS process, which offers large value of threshold voltage. The squarer topology was modified for 0.18um CMOS process, which threshold voltage was smaller, operating under the extreme low supply voltage of 0.5V. The output current is proportional to square of the input voltage in each case. Simulation results verify the theoretical analysis demonstrating small relative error and fast transient response.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114179561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A fast architecture for exhaustive search block matching algorithm with MPEG-4 applications 基于MPEG-4的快速穷举搜索块匹配算法
2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009) Pub Date : 2009-12-01 DOI: 10.1109/ICECS.2009.5410777
M. Sayed
{"title":"A fast architecture for exhaustive search block matching algorithm with MPEG-4 applications","authors":"M. Sayed","doi":"10.1109/ICECS.2009.5410777","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410777","url":null,"abstract":"This paper presents a fast architecture for exhaustive search block matching algorithm (ESBMA). The proposed architecture has a SIMD structure with 31 processing elements (PEs). The proposed architecture has been prototyped, simulated and synthesized for the Xilinx Virtex II FPGA XC2V3000-4. It has a maximum clock frequency of 142.6 MHz that enables processing more than 41 4CIF frames per second. This prototyped architecture utilizes 40% of the register bits, 15% of the Block RAMs, and 54% of the LUTs in Xilinx Virtex II FPGA XC2V3000-4.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115163692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Reducing handoff blocking probability in fourth generation wireless networks 降低第四代无线网络中的切换阻塞概率
2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009) Pub Date : 2009-12-01 DOI: 10.1109/ICECS.2009.5410783
F. Zarai, I. Smaoui, L. Kamoun, M. Banat
{"title":"Reducing handoff blocking probability in fourth generation wireless networks","authors":"F. Zarai, I. Smaoui, L. Kamoun, M. Banat","doi":"10.1109/ICECS.2009.5410783","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410783","url":null,"abstract":"In this paper, we propose new methods to reduce the handoff blocking probability in next generation wireless networks. This reduction is based on an adaptive resource reservation scheme that provides quality of service (QoS) guarantees, and handoff priority in admission and in scheduling. To this purpose, the proposed schemes employ received signal strength (RSS) and speed to reserve available resources for a user from its adjacent cells according to its current position. The Performances of the proposed schemes are compared with others methods by simulation. Our new scheme reduces not only the handoff blocking probability, but also maintains a low new call blocking probability.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"112 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114749711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Discussion on the performances of hybrid SET-MOSFET Voltage Controlled Oscillators 混合式SET-MOSFET压控振荡器的性能探讨
2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009) Pub Date : 2009-12-01 DOI: 10.1109/ICECS.2009.5410886
W. Xuan, F. Calmon, N. Baboux, A. Souifi
{"title":"Discussion on the performances of hybrid SET-MOSFET Voltage Controlled Oscillators","authors":"W. Xuan, F. Calmon, N. Baboux, A. Souifi","doi":"10.1109/ICECS.2009.5410886","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410886","url":null,"abstract":"This article firstly, presents an analytical static model of Single Electron Transistor (SET) based on the orthodox theory and enhanced to take into account the influence of temperature (thermionic current). Comparisons with the SIMON simulator and measurements show that our model is correct and accurate. Using this model, we analysed the performances of Voltage Controlled Oscillators (VCO) based on two hybrid SET-MOSFET architectures. In particular we compared the VCO performances with ideal and realistic SETs for different CMOS technology nodes.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126634128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Gigabit UDP/IP network stack in FPGA FPGA中的千兆UDP/IP网络栈
2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009) Pub Date : 2009-12-01 DOI: 10.1109/ICECS.2009.5410757
F. Herrmann, Guilherme Perin, Josue Paulo Jose de Freitas, Rafael Bertagnolli, J. B. Martins
{"title":"A Gigabit UDP/IP network stack in FPGA","authors":"F. Herrmann, Guilherme Perin, Josue Paulo Jose de Freitas, Rafael Bertagnolli, J. B. Martins","doi":"10.1109/ICECS.2009.5410757","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410757","url":null,"abstract":"This paper presents a proposal of a Gigabit UDP/IP network stack in FPGA, which is the stack of the widely used in VoIP and Video-conference applications. This network node implements the Network, Transport and Link Layer of a traditional stack. This architecture is integrated and developed using Xilinx ISE tool and synthesized to a Spartan-3E FPGA. We show architecture details, timing and area results of a practical prototyping. Also, we compare our prototype and results with other works in terms of area (Xilinx slices), speed (MHz), maximum Ethernet frame length (bytes) and maximum Ethernet speed (Mbps). Comparing to these works our architecture obtained a intermediate solution in area and is the best implementation in terms of speed (MHz).","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128133630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
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