2012 IEEE International Reliability Physics Symposium (IRPS)最新文献_第3页

Optimization of NH3 plasma surface treatment using Cu silicide formation for EM/SM improvement 利用硅化铜地层进行NH3等离子体表面处理以提高EM/SM性能

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241895

W. Baek, Naser Chowdhury, Lan Loi, Hyeon-Seag Kim, Sungjin Kim, A. delRosario, E. Adem, B. Tracy, J. Pak

引用次数: 1

Impact of Cu diffusion from Cu through-silicon via (TSV) on device reliability in 3-D LSIs evaluated by transient capacitance measurement 用瞬态电容测量方法评估Cu - through-silicon孔(TSV)扩散对三维lsi器件可靠性的影响

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241777

Kang-wook Lee, J. Bea, Y. Ohara, T. Fukushima, T. Tanaka, M. Koyanagi

{"title":"Impact of Cu diffusion from Cu through-silicon via (TSV) on device reliability in 3-D LSIs evaluated by transient capacitance measurement","authors":"Kang-wook Lee, J. Bea, Y. Ohara, T. Fukushima, T. Tanaka, M. Koyanagi","doi":"10.1109/IRPS.2012.6241777","DOIUrl":"https://doi.org/10.1109/IRPS.2012.6241777","url":null,"abstract":"The influence of Cu contamination from Cu through-silicon via (TSV) on device reliability in the 3-D LSI was electrically evaluated by capacitance-time (C-t) measurement. The Cu/Ta gate trench capacitors with two types of Ta barrier layers of 10-nm and 100-nm thicknesses (at the wafer surface) were fabricated. The C-t curves of the trench capacitors with 10-nm thick Ta layer were severely degraded even after the initial annealing for 5min. It means that Cu atoms diffuse into the active area from the Cu TSV through scallop portions with extremely thin Ta layer in TSVs, and consequently, the generation lifetime of minority carrier is significantly reduced. Meanwhile, the C-t curves of the trench capacitors with 100-nm thick Ta layer exhibit no change after annealing up to 60min at 300°C, but show significant degradation after the initial annealing for 5min at 400°C. The C-t analysis is a useful method to electrically characterize the influence of Cu contamination from the Cu TSV on device reliability in fabricated LSI wafers.","PeriodicalId":341663,"journal":{"name":"2012 IEEE International Reliability Physics Symposium (IRPS)","volume":"95 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134394029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 17

Technology scaling and soft error reliability 技术尺度和软误差可靠性

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241810

L. Massengill, B. Bhuva, W. Holman, M. Alles, T. D. Loveless

引用次数: 58

NEMS based logic and memory circuits 基于 NEMS 的逻辑和存储电路

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241823

J. Jang, G. Amaratunga

引用次数: 1

Methodology for delivering reliable CIGS based building integrated photovoltaic (BIPV) products 提供可靠的基于CIGS的建筑集成光伏(BIPV)产品的方法

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241825

R. Feist, M. Mills, N. Ramesh

{"title":"Methodology for delivering reliable CIGS based building integrated photovoltaic (BIPV) products","authors":"R. Feist, M. Mills, N. Ramesh","doi":"10.1109/IRPS.2012.6241825","DOIUrl":"https://doi.org/10.1109/IRPS.2012.6241825","url":null,"abstract":"A key challenge currently limiting the wide spread acceptance of Cu(In,Ga)Se2 (CIGS) thin-film photovoltaic technologies in building integrated photovoltaic (BIPV) systems is the demonstration of product reliability in accelerated testing to support rapid product improvement cycles and new product introduction. To augment multi-year & geographically diverse real world performance a priori, one must adopt a creative approach to ensure rapid product introduction of new, highly reliable solar PV systems. Here, we present a synopsis of Dow Solar's reliability philosophy that utilizes multi-stress testing, a combination of accelerated and real world conditions, to provide predictive life stress relationships for CIGS based BIPV system level product performance. In addition, the methodology we present here includes a proactive philosophy of identifying and isolating individual reliability failure mechanisms in PV technologies. This philosophy enables significantly shorter development cycles and the obtainment of meaningful product performance feedback. The approach, which is balanced between accelerated testing and field testing data, may be utilized to establish lifetime performance of any PV technology.","PeriodicalId":341663,"journal":{"name":"2012 IEEE International Reliability Physics Symposium (IRPS)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115816157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

A consistent physical framework for N and P BTI in HKMG MOSFETs HKMG mosfet中N和P BTI的一致物理框架

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241840

K. Joshi, S. Mukhopadhyay, N. Goel, S. Mahapatra

引用次数: 97

FET arrays as CPI sensors for 3D stacking and packaging characterization FET阵列作为CPI传感器用于3D堆叠和封装表征

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241790

A. Ivankovic, V. Cherman, G. van der Plas, B. Vandevelde, G. Beyer, E. Beyne, I. De Wolf, D. Vandepitte

{"title":"FET arrays as CPI sensors for 3D stacking and packaging characterization","authors":"A. Ivankovic, V. Cherman, G. van der Plas, B. Vandevelde, G. Beyer, E. Beyne, I. De Wolf, D. Vandepitte","doi":"10.1109/IRPS.2012.6241790","DOIUrl":"https://doi.org/10.1109/IRPS.2012.6241790","url":null,"abstract":"FET arrays are investigated from the viewpoint of Chip-Package Interaction (CPI) sensor suitability and presented as a possible solution for experimental characterization of CPI effects during 3D assembly steps: Stacking and packaging. The study presents a methodology consisting of an experimental approach with the support of FEM modeling. The use of the transistors as stress sensors covering in-plane stress components is justified, after which the applicability of the transistors to the actual stacking and packaging stress states is discussed. Calibration to in-plane stress of long and short channel transistors, p and n type, is performed to obtain sensor sensitivities and link stress to current shift by according calculated piezocoefficients. Testing the FET arrays as sensors is firstly done by means of a simple structure where a die is glued to a plastic substrate. The electrical measurements are compared to FEM models and profilometric scans. The sensors are next utilized to obtain first results from 3D stacking and packaging. The underfill - microbump mechanism in a 2-die stack is quantified and initial results on overmould impact are discussed.","PeriodicalId":341663,"journal":{"name":"2012 IEEE International Reliability Physics Symposium (IRPS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117267049","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 17

GaN power device and reliability for automotive applications GaN功率器件和汽车应用的可靠性

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241815

T. Kachi, D. Kikuta, T. Uesugi

引用次数: 37

Thermomechanical reliability challenges induced by high density Cu TSVs and metal micro-joining for 3-D ICs 高密度Cu tsv和金属微连接对三维集成电路热机械可靠性的挑战

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241860

K. Lee, T. Fukushima, T. Tanaka, M. Koyanagi

{"title":"Thermomechanical reliability challenges induced by high density Cu TSVs and metal micro-joining for 3-D ICs","authors":"K. Lee, T. Fukushima, T. Tanaka, M. Koyanagi","doi":"10.1109/IRPS.2012.6241860","DOIUrl":"https://doi.org/10.1109/IRPS.2012.6241860","url":null,"abstract":"The thermo-mechanical reliability challenges induced by high-density Cu TSVs and metal micro-joining are discussed. Cu TSV with the diameter of 20-μm induced the maximum compressive stress of ~1 GPa at the Si substrate adjacent to them after annealed at 300°C. Depart from Cu TSV, the stress/strain in Si substrate changed to tensile stress and finally going to zero, where the TSV pitch is larger than twice of TSV size. However, in high density Cu TSV array with small TSV pitch, the Si substrate within small TSV spacing keep large compressive stress, which will seriously affect the mobility in active Si area, and thus device characteristics. Also, these large compressive stress leads to not only extrusion and peeling of Cu TSV, but also die cracking. The thermo-mechanical stress was produced during the bonding using high-density metal bumps. CuSn bump of 20-μm size has induced compressive stress of 140MPa beneath Si wafer surface, and it penetrates deeper area with large stress value after the bonding. The drain current and electron mobility of n-MOSFET which was located 15μm distance from microbump are changed by ~10 % due to the local tensile stress of 500 MPa induced by microbump. Electron mobility changed varying with the distance from microbump. Influences of mechanical stress induced by Cu TSVs and microbump-underill joining on device characteristics were also evaluated.","PeriodicalId":341663,"journal":{"name":"2012 IEEE International Reliability Physics Symposium (IRPS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124997916","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 14

Comprehensive modeling of NAND flash memory reliability: Endurance and data retention NAND闪存可靠性的综合建模:耐久性和数据保留

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241922

Z. Xia, Dae Sin Kim, N. Jeong, Young-Gu Kim, Jae-ho Kim, Keun-Ho Lee, Young-Kwan Park, C. Chung, H. Lee, Jungin Han

引用次数: 28