27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium最新文献_第2页

Achieving higher margins by solving the mobile flash test challenge 通过解决移动flash测试挑战获得更高的利润

27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium Pub Date : 2002-11-07 DOI: 10.1109/IEMT.2002.1032789

T. Trexler

引用次数: 0

A two-step process for achieving an open test-development environment 实现开放测试开发环境的两步过程

27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium Pub Date : 2002-11-07 DOI: 10.1109/IEMT.2002.1032788

H. Lam

引用次数: 3

Ball shear versus ball pull test methods for evaluating interfacial failures in area array packages 评估区域阵列封装中界面失效的球剪切与球拉力试验方法

27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium Pub Date : 2002-11-07 DOI: 10.1109/IEMT.2002.1032754

R. Coyle, A. Serafino, P. Solan

引用次数: 15

Optimizing wire bonding processes for maximum factory portability 优化焊线工艺，最大限度地提高工厂的可移植性

27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium Pub Date : 2002-11-07 DOI: 10.1109/IEMT.2002.1032774

G. Gillotti, R. Cathcart

引用次数: 7

Improving yield, productivity, and quality in test assembly and packaging through direct part marking and unit level traceability 通过直接零件标记和单元级可追溯性，提高测试装配和包装的产量、生产率和质量

27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium Pub Date : 2002-11-07 DOI: 10.1109/IEMT.2002.1032743

J. Agapakis, L. Figarella

{"title":"Improving yield, productivity, and quality in test assembly and packaging through direct part marking and unit level traceability","authors":"J. Agapakis, L. Figarella","doi":"10.1109/IEMT.2002.1032743","DOIUrl":"https://doi.org/10.1109/IEMT.2002.1032743","url":null,"abstract":"Identifying and tracking individual devices throughout test, assembly and packaging using directly marked 2D data matrix symbols is a viable application and the basis of several SEMI traceability standards. Recently, it has been utilized more extensively in high-volume manufacturing. Advancements such as package-less strip designs make traceability challenges more acute and lead to the development of new methodologies for assembly and test, such as strip testing and mapping. In these applications, 2D symbology marked on lead frames, strips or individual devices provides unit level traceability, prevents mixed lots, and allows defect tracking - ultimately improving yield, productivity and quality. This paper highlights the basic advantages of directly marked 2D data matrix symbols versus conventional 1D bar codes. It describes representative traceability applications in test, assembly and packaging, and the benefits derived from implementation in each business case. A system-level methodology for implementing unit level traceability is presented, including the four basic elements: symbol marking, mark verification, symbol reading and communication of results. Finally, recognizing that a variety of options are often required for effective implementation and integration in a production line, it addresses alternative reading and verification systems ranging from board-level products to intelligent cameras and hand-held readers.","PeriodicalId":340284,"journal":{"name":"27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134485487","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Chip-in-polymer: volumetric packaging solution using PCB technology 聚合物芯片:采用PCB技术的体积封装解决方案

27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium Pub Date : 2002-11-07 DOI: 10.1109/IEMT.2002.1032721

E. Jung, D. Wojakowski, A. Neumann, C. Landesberger, A. Ostmann, R. Aschenbrenner, H. Reichl

引用次数: 10

Flux technology for lead-free alloys and its impact on cleaning 无铅合金焊剂技术及其对清洗的影响

27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium Pub Date : 2002-11-07 DOI: 10.1109/IEMT.2002.1032772

N. Lee, M. Bixenman

{"title":"Flux technology for lead-free alloys and its impact on cleaning","authors":"N. Lee, M. Bixenman","doi":"10.1109/IEMT.2002.1032772","DOIUrl":"https://doi.org/10.1109/IEMT.2002.1032772","url":null,"abstract":"Flux technology for lead-free alloys differs considerably from that for eutectic Sn/Pb solder systems, mainly for soldering and cleaning purpose. For most of the lead-free solders, paste handling is not an issue. Although dust has not settled yet, it becomes clear that the flux needed should have higher flux capacity, higher oxygen barrier capability, and higher thermal stability. Halide-containing fluxes may prevail, due to the high flux efficiency per unit flux volume. The oxygen barrier capability can be reduced if an inert reflow atmosphere is available. RMA flux, no-clean flux with high solid content, and water washable systems exhibit a greater prospect to be upgraded for lead-free applications. For 58Bi/42Sn solder, flux with low activation temperature is needed. For Sn/Zn/Bi solders, the demand on flux capacity and oxygen barrier capability is even greater than other lead-free solder systems. In addition, the fluxes should be stable enough to retard the reaction with Zn. Cleaning flux residue of lead-free solder pastes is more challenging than that of Sn/Pb systems. The cleanability decreases from no-clean soft-residue fluxes to water washable fluxes to no-clean hard residue fluxes. Improvement in cleanability may link to improvement in thermal stability of fluxes.","PeriodicalId":340284,"journal":{"name":"27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122651972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

PATCHWORK smart power thick-film hybrids for automotive under hood applications 用于汽车引擎盖下应用的PATCHWORK智能功率厚膜混合动力车

27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium Pub Date : 2002-11-07 DOI: 10.1109/IEMT.2002.1032719

P.K. Wilczek

引用次数: 0

Investigation of 3-D embedded inductors using Monte Carlo analysis 三维嵌入式电感的蒙特卡罗分析研究

27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium Pub Date : 2002-11-07 DOI: 10.1109/IEMT.2002.1032764

Seogoo Lee, Jongseong Choi, G. S. May, I. Yun

引用次数: 2

Silicon thinning and stacked packages 硅变薄和堆叠封装

27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium Pub Date : 2002-11-07 DOI: 10.1109/IEMT.2002.1032722

D. New

引用次数: 7