Chip-in-polymer: volumetric packaging solution using PCB technology

Abstract

The new challenge is to incorporate not only passive components, but as well active circuitry (ICs) and the necessary thermal management. Ultra thin chips (i.e. silicon dies thinned down to <50/spl mu/m total thickness) lend themselves to reach these goals. Chips with that thickness can be embedded in the dielectric layers of modern laminate PCBs. Micro via technology allows one to contact the embedded chip to the outer faces of the system circuitry. As an ultimate goal for microsystem. integration, the embedding of optical and fluidic system components can be envisioned. This paper presents the first attempts to embed thin silicon dies in to polymeric system carriers. The aspects of embedding and making the electrical contact as well as the thermal management are highlighted. To reach the goal of a vertically stackable "box-of-bricks" type of ultra thin (UT) package, thin silicon chips are embedded and interconnected on a peripheral UT BGA utilizing low cost technologies derived from the PCB manufacturing industry.