{"title":"硅变薄和堆叠封装","authors":"D. New","doi":"10.1109/IEMT.2002.1032722","DOIUrl":null,"url":null,"abstract":"The market demand of mobile electronic appliances is for smaller, lightweight physical characteristics with greater functionality. This demand contributes to advances in packaging technology that require semiconductor devices to be thinner to meet size and high thermal reliability constraints. Even though the active layer of most devices amounts for only 5-10 microns (with some devices needing about 20 microns to assure functionality of the device), the current thickness for new technologies such as ICs for smart card applications are around 150 microns. Based on current developments, the thickness of thinned wafers will start to approach 50 microns in the next couple of years. Therefore, it is not surprising that silicon thinning and stress relief have become important issues in the backend and assembly areas of semiconductor component manufacturers. Disco Corporation are developing new processes and pursuing industry initiatives to provide solutions to address these issues.","PeriodicalId":340284,"journal":{"name":"27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium","volume":"78 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Silicon thinning and stacked packages\",\"authors\":\"D. New\",\"doi\":\"10.1109/IEMT.2002.1032722\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The market demand of mobile electronic appliances is for smaller, lightweight physical characteristics with greater functionality. This demand contributes to advances in packaging technology that require semiconductor devices to be thinner to meet size and high thermal reliability constraints. Even though the active layer of most devices amounts for only 5-10 microns (with some devices needing about 20 microns to assure functionality of the device), the current thickness for new technologies such as ICs for smart card applications are around 150 microns. Based on current developments, the thickness of thinned wafers will start to approach 50 microns in the next couple of years. Therefore, it is not surprising that silicon thinning and stress relief have become important issues in the backend and assembly areas of semiconductor component manufacturers. Disco Corporation are developing new processes and pursuing industry initiatives to provide solutions to address these issues.\",\"PeriodicalId\":340284,\"journal\":{\"name\":\"27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium\",\"volume\":\"78 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-11-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.2002.1032722\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.2002.1032722","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The market demand of mobile electronic appliances is for smaller, lightweight physical characteristics with greater functionality. This demand contributes to advances in packaging technology that require semiconductor devices to be thinner to meet size and high thermal reliability constraints. Even though the active layer of most devices amounts for only 5-10 microns (with some devices needing about 20 microns to assure functionality of the device), the current thickness for new technologies such as ICs for smart card applications are around 150 microns. Based on current developments, the thickness of thinned wafers will start to approach 50 microns in the next couple of years. Therefore, it is not surprising that silicon thinning and stress relief have become important issues in the backend and assembly areas of semiconductor component manufacturers. Disco Corporation are developing new processes and pursuing industry initiatives to provide solutions to address these issues.