IEEE European Test Workshop, 2001.最新文献

On hardware generation of random single input change test sequences 随机单输入变换测试序列的硬件生成

IEEE European Test Workshop, 2001. Pub Date : 2001-05-29 DOI: 10.1109/ETW.2001.946674

R. David, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel

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引用次数: 9

Reducing analogue fault-simulation time by using ifigh-level modelling in dotss for an industrial design 通过在工业设计中使用点的高级建模来减少模拟故障仿真时间

IEEE European Test Workshop, 2001. Pub Date : 2001-05-29 DOI: 10.1109/ETW.2001.946663

L. Fang, G. Gronthoud, H. Kerkhoff

引用次数: 12

Reducing the susceptibility of design-for-delay-testability structures to process- and application-induced variations 降低延迟可测试性设计结构对工艺和应用引起的变化的敏感性

IEEE European Test Workshop, 2001. Pub Date : 2001-05-29 DOI: 10.1109/ETW.2001.946658

H. Vermaak, H. Kerkhoff

引用次数: 3

Rxiensing scan chains for test pattern decompression Rxiensing扫描链用于测试模式解压缩

IEEE European Test Workshop, 2001. Pub Date : 2001-05-29 DOI: 10.1109/ETW.2001.946677

R. Dorsch, H. Wunderlich

引用次数: 27

Demodulation based testing of off-chip driver performance 基于解调的片外驱动性能测试

IEEE European Test Workshop, 2001. Pub Date : 2001-05-29 DOI: 10.1109/ETW.2001.946660

W. Daehn

引用次数: 1

A fault model for function and delay testing 用于功能和延迟测试的故障模型

IEEE European Test Workshop, 2001. Pub Date : 2001-05-29 DOI: 10.1109/ETW.2001.946657

Joonhwan Yi, J. Hayes

引用次数: 16

System level diagnosis - a comparison of two alternative approaches 系统级诊断——两种可选方法的比较

IEEE European Test Workshop, 2001. Pub Date : 2001-05-29 DOI: 10.1109/ETW.2001.946670

M. Khalil, C. Robach

引用次数: 0

A VHDL-based virtual test concept for pre-silicon test-program debug 一个基于vhdl的虚拟测试概念，用于预硅测试程序调试

IEEE European Test Workshop, 2001. Pub Date : 2001-05-29 DOI: 10.1109/ETW.2001.946679

M. Rona, G. Krampl

引用次数: 1

The use of equivalent fault analysis to improve static D.C. fault diagnosis - a potentiometric DAC case study 利用等效故障分析改进静态直流故障诊断——一个电位DAC案例研究

IEEE European Test Workshop, 2001. Pub Date : 2001-05-29 DOI: 10.1109/ETW.2001.946666

M. Worsman, M. Wong, Yim-Shu Lee

引用次数: 2

On-chip signal level evaluation for mixed-signal ICs using digital window comparators 使用数字窗口比较器的混合信号集成电路的片上信号电平评估

IEEE European Test Workshop, 2001. Pub Date : 2001-05-29 DOI: 10.1109/ETW.2001.946664

D. Venuto, M. J. Ohletzo, B. Riccò

引用次数: 5