IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings最新文献
{"title":"Implementation of an in-situ particle monitoring methodology in a production environment","authors":"Y. Khawaja, S. Felker, T. Desanti","doi":"10.1109/ASMC.1996.558021","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558021","url":null,"abstract":"The time and logistics associated with particle testing on product have driven manufacturing to find fast and effective monitoring techniques that can deliver high manufacturing efficiency at a lower cost. In-situ particle monitoring is an accurate and cost effective method of contamination control in a production environment. In-situ particle monitors use laser particle counters to sample particles exiting the chamber, the data is displayed in real-time enabling the user to respond immediately to any out of control conditions. Implementation of in-situ particle monitoring on a chemical downstream etch system in a production environment is described. The chamber clean cycles on this etch system are driven by polymer flaking from chamber parts, which makes real time particulate monitoring necessary. In-situ plasma clean process is characterized using in-situ particle monitors to reduce particulate flaking from chamber parts. All process steps during the etch step are also analyzed using in-situ monitors to identify and eliminate sources of particulate contamination. Implementation of in-situ monitoring resulted in a 92% reduction in test wafer costs, and also provided a model for predicting particulate perturbations in the etch system. Improvements in cleaning techniques resulted in a two fold improvement in the mean time between cleans.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121306016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Crowley, Sey-Ping Sun, Curtis Clingingsmith, M. Turner
{"title":"Strategic alliances for equipment reliability improvement in a dynamic startup environment","authors":"J. Crowley, Sey-Ping Sun, Curtis Clingingsmith, M. Turner","doi":"10.1109/ASMC.1996.558118","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558118","url":null,"abstract":"For the AMD Fab 25 start-up in Austin, TX, it was critical to achieve high availability and low defectivity performance for all critical equipment early on. The economics of the project required that process maturity be reached within hundreds of lots rather than thousands of lots, which can only be done with a reliable equipment set. However, it also required the capability of extending the technology many years into the future. This meant that the tools selected for the fab generally were the most advanced with small installation bases and, as a result, little background experience. Because of this it was imperative that we achieve rapid cycles of learning on these tool sets early in the start-up. The Novellus Concept Two Sequel and Altus were selected as the major CVD tools for use in Fab 25. An equipment Continuous Improvement Team (CIT) was formed prior to installation of the equipment. This team consisted of representatives from both Novellus and AMD. The focus was on key reliability metrics required to facilitate maturation of the fab: availability, Mean Time Between Failure (MTBF), and cost-of-ownership. A strategy for achieving our goals was devised. Critical to this process was partnering with Novellus Systems. The alliance between AMD and Novellus was designed to optimize learning on this tool set. Interaction occurred at all levels including engineering, manufacturing, maintenance, and management from both parties. All data was continuously and rigorously reviewed and validated. Knowledge was transferred in both directions. The CIT focused on critical problems during the start-up, rapidly addressing them.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115080538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Role of rapid isothermal processing (RIP) in cycle time reduction","authors":"R. Singh, R. Sharangpani","doi":"10.1109/ASMC.1996.557989","DOIUrl":"https://doi.org/10.1109/ASMC.1996.557989","url":null,"abstract":"Over the last few years, rapid isothermal processing (RIP) is emerging as a key low thermal budget single wafer processing technique. The heating of the wafers in RIP can be accomplished using lamps mounted (relative to the wafer front surface) either at the bottom, sides, top or a combination of these arrangements. The lamp configuration in commercially available RIP systems varies from vendor to vendor. Each configuration provides a different high energy photon flux on the wafer's front surface. Due to certain quantum effects initiated by high energy photons, the processing time depends on the specific lamp configuration used for a given processing temperature. As a result of these quantum photoeffects, properly designed RIP systems can further reduce the cycle time and provide improved performance over other systems. Experimental results for typical processing steps (front and back end of the line) are provided in this paper.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129627398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Optical characterization of TiN thin films","authors":"W. McGahan, B. Spady, J. Iacoponi, J.D. Williams","doi":"10.1109/ASMC.1996.558081","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558081","url":null,"abstract":"In this work we demonstrate the combined use of spectroscopic ellipsometry (performed from 420-720 nm at 65/spl deg/ angle of incidence) and spectroscopic reflectometry (performed from 200-800 nm at normal incidence) for the characterization of thin TiN films deposited on thick oxide films on silicon. By simultaneously analyzing both reflectance and ellipsometric spectra acquired from the same physical location on the sample surface we are able to precisely determine both the TiN and oxide film thicknesses, as well as the optical constants of the TiN film. The key to this analysis is the use of the Lorentz oscillator dispersion model to parameterize the optical constants of the TiN thin film such that these optical constants can be varied in the analysis by varying a relatively small number of parameters in the Lorentz oscillator dispersion model.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127297843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"User group implementation with a U.S. supplier","authors":"S. Hossain-Pas, J. Brennan, D. Matsuhiro","doi":"10.1109/ASMC.1996.558119","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558119","url":null,"abstract":"Tool productivity or Overall Equipment Effectiveness (OEE) is an important topic in the semiconductor industry. One strategy for increasing tool productivity involves increasing the reliability of the system. This task can be better accomplished when the factors affecting the reliability parameters are identified, corrected, and communicated. A User's Group allows all users to share data, issues, lessons learned, and best known methods which then provide the foundation for identifying and resolving barriers to productivity. Often, discussion and communication between the users and the supplier can provide an immediate basis for solutions. Further improvements will be made over time in a partnership between the supplier and the users.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121800756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Yield risk cards at D2","authors":"T. Agostino, V. Dhar, R. Dudonis, J. Ku","doi":"10.1109/ASMC.1996.558109","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558109","url":null,"abstract":"Uncommon events or out of the ordinary situations often trigger line yield losses such as misprocesses, miscommunications, or missed opportunities. D2 distributed bright red \"Yield Risk\" cards to the factory technicians to visually highlight material requiring special handling and tangibly draw attention to the unusual situation. The simplicity of the red cards coupled with the method used to proliferate the idea makes this system especially unique and transferable to other factories or situations where technician involvement is essential. This article documents and discusses results from the development and implementation of a visual tool, the Yield Risk card, used to enhance TMT yield effectiveness. The project was begun April 1, 1995, and continues today at D2 in response to high operations related line yield losses. The purpose of the project was to develop a tool that addressed line yield losses and received high levels of technician buy-in and, subsequently, high usage.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115255617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The effectiveness of defect-to-yield correlations [semiconductor manufacture]","authors":"K. Zinke, R. Spencer, D. Freeman","doi":"10.1109/ASMC.1996.558096","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558096","url":null,"abstract":"Most semiconductor manufacturers have a yield enhancement group to continually monitor and evaluate probe and E-test data. In addition to assuring that devices meet parametric specifications, the yield enhancement group will also focus on understanding the relationship between post fab probe data and in-line wafer processing data. In-line data is information such as equipment ID, operator, wafer sequence, lot sequence, thickness/CD, equipment clean frequency or any other measurable and recordable event that occurs during the manufacturing process. When clear correlations are found between the post fab probe and in-line data, redirection of product flow or some type of corrective action needs to be considered. This method of continuous process control driven by electrical correlation to in-line manufacturing events drives up the yield and improves a companies time to market and profit metrics.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126418023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"300 mm tool automation and its impact on fab design and OEE","authors":"M. Weiss","doi":"10.1109/ASMC.1996.557988","DOIUrl":"https://doi.org/10.1109/ASMC.1996.557988","url":null,"abstract":"The challenge to building fabs in the 300 mm era will be to maximize the productivity of capital. One road in this direction is to increase Overall Equipment Effectiveness (OEE). At this time the approach being taken to increasing OEE involves the redesign of tools to improve reliability, increase throughput, reduce footprint, etc. The onset of 300 mm, however, presents an opportunity to take a more system wide approach at increasing OEE. In this paper we quantify the effects that material handling has on the cost of front end wafer fab by analyzing the effects that selection of batch size, carrier design, tool layout, wafer handling systems, etc. have on the Manufacturing Lead Time (MLT) of a chip. The paper then identifies design options for 300 mm handling components which increase the amount of time wafers spend getting value added in process tools, and decrease the overall non-value added handling times. This presents the basis for a description of a 300 mm fab tools and carriers which are designed as a total system to increase the OEE of the total fab, or the Overall Fab Effectiveness (OFE).","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128301363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The free factory: cutting cycle time and gaining output","authors":"M. Page","doi":"10.1109/ASMC.1996.557986","DOIUrl":"https://doi.org/10.1109/ASMC.1996.557986","url":null,"abstract":"In 1992 Texas Instruments launched a program to maximize the throughput in its existing wafer fabrication facilities by improving yields, reducing cycle times and increasing the predictability of the manufacturing process. It was a monumental effort, involving everyone in TI's Semiconductor Group worldwide, from process technicians on the factory floor, to design engineers, to R&D scientists to top executives. TI's \"Free Fab\" initiative was aimed at every process, every manufacturing step from design to finished product in every TI semiconductor manufacturing facility worldwide. The challenges were diverse spanning standardized commodity product processes as well as customized product processes, like digital signal processors. The results have been dramatic. By 1994, TI had gained the equivalent of a complete factory in output and, by end of 1995 a second \"free\" factory had been gained, all from productivity improvements. Cycle times have been cut from 140 days on a custom product to 60 days and on-time delivery is the best in the industry at over 95 percent. While the results are significant, the bigger challenge now is keep the organization focused on continued improvement in yields, cycle times and predictability.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130660950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Defect reduction through statistical process control and prior-level subtraction analysis","authors":"D. Shanks","doi":"10.1109/ASMC.1996.558023","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558023","url":null,"abstract":"This paper discusses the reduction of defects in a nitride etching process using statistical process control (SPC). How defects are reduced in a contact process is also described.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130853986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}