IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings最新文献_第9页

Defect reduction and cost savings through re-inventing RCA cleans 通过重新发明RCA清洁来减少缺陷和节省成本

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.558026

G. Ouimet, D. Rath, Susan L. Cohen, E. Fisch, G. W. Gale

{"title":"Defect reduction and cost savings through re-inventing RCA cleans","authors":"G. Ouimet, D. Rath, Susan L. Cohen, E. Fisch, G. W. Gale","doi":"10.1109/ASMC.1996.558026","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558026","url":null,"abstract":"RCA cleans, (also referred to as SC1 and SC2 cleans) have been used in semiconductor manufacturing for decades. These solutions, as developed by Kern and Puotinen in 1965, are multi-purpose surface treatments. If used as originally developed, they are effective at both organic and metallic contamination control, and are viewed as innocuous to silicon based surfaces. Only recently have new processing conditions been explored. Historically, these mixtures of water, hydrogen peroxide, and either ammonium hydroxide (for the SC1 solution) or hydrochloric acid (for the SC2 solution), were mixed at a 5:1:1 and 6:1:1 ratio respectively and used at temperatures of 70-80 degrees C. This paper presents a comprehensive study using surface analysis and inspection techniques to test residue removal, silicon surface roughening, silicon dioxide etch rates, and particle removal efficiency due to the effects of chemical concentration and temperature. Impinging high-frequency sonic energy onto the wafer surface at different wafer to wafer spacing in the processing cassette is also studied. The authors have found that lower concentration SC1 and SC2 solutions, in concert with \"megasonic\" energy, leads to higher particle cleaning efficiency, excellent residue removal, reduced silicon surface roughening, and reduced chemical usage in several types of processing equipment. These effects add up to reduced semiconductor device defect densities at a net lower cost. Electrical test data on both DRAM and micro-processors are presented.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130715177","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Managing factory risk to improve customer satisfaction 管理工厂风险，提高客户满意度

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.558005

G. Depinto

引用次数: 5

30% productivity increase of 16 Mb-DRAM gate-conductor etching without additional investment 在不增加投资的情况下，16mb dram栅极导体刻蚀的生产率提高30%

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.557973

U. Rogatty, F.G. Boebel

{"title":"30% productivity increase of 16 Mb-DRAM gate-conductor etching without additional investment","authors":"U. Rogatty, F.G. Boebel","doi":"10.1109/ASMC.1996.557973","DOIUrl":"https://doi.org/10.1109/ASMC.1996.557973","url":null,"abstract":"For today high volume 16 Mb-DRAM manufacturing process optimization and increase of tool utilization is a key importance to gain maximum productivity. The authors show in detail how they achieved a 30% productivity increase for the gate conductor etch process. Special emphasis was put on the methodology used for analysis of process, process-flow and tool set. The modified process steps are explained in detail. The careful analysis of a clustered 4 chamber AMAT P5000 MarkII etch process (Capoxide/Wsix/Strip/Poly) showed that the maximum throughput was gated by the slowest single raw process time (RTP). By declustering the process, we were able to rearrange the number of etch chambers according to the RPT of each single etch step and therefore the utilisation of the available etch chambers was optimized. A further improvement was achieved by modifying the WSix etch process, introducing a HARDMASK and moving the resist-strip on stand-alone FUSION and FSI tools, which were used in another process as well. This paper shows that due to the declustered process. The combined uptime of the 4-chamber etch tools was increased. All combined improvements gave a productivity increase and improved wafer throughput of about 30% compared to the situation before. The capital investment was less than 300K$ and no further etch tools had to be purchased.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128953576","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

The SHOP tracking and notification system SHOP跟踪和通知系统

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.557966

R. Trexler

引用次数: 0

Use of on-product measurements for process control for improved manufacturing efficiency and reduced costs 在过程控制中使用产品测量，以提高生产效率和降低成本

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.558086

R.G. Cosway, M.G. Ridens, M. Peters, K. Catmull, S. R. Chilton

{"title":"Use of on-product measurements for process control for improved manufacturing efficiency and reduced costs","authors":"R.G. Cosway, M.G. Ridens, M. Peters, K. Catmull, S. R. Chilton","doi":"10.1109/ASMC.1996.558086","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558086","url":null,"abstract":"With the increasing expense of cleanroom space, cost-effective wafer fabrication requires efficient use of that space and the minimization of non-value added activities as well as reducing the potential for scrap. To this end, minimization of test wafer usage provides multiple benefits through cost savings and improved efficiency. Historically, a number of in-line measurements have been performed on separate test wafers included with product wafers during diffusion processes. By performing these in-line measurements directly on product, a number of benefits accrue: (1) reduced test wafer cost. (2) reduced storage requirements. (3) reduced need for equipment to reclaim test wafers. (4) reduced need for direct labor to reclaim test wafers, and (5) reduced engineering \"false alarms\" due to incorrectly processed test wafers. In addition, quality improvements can be seen due to measurements being taken on actual product instead of separate non-product wafers. Implementation of on-product measurements for diffusion processes in a high-volume, 200-man factory has required a number of changes in both philosophy and methodology. These include addition of common scribe-grid process control (SGPC) structures on all production mask sets and procurement of all metrology tools with pattern-recognition capability. We will show the necessary steps to implementation with concern for overall manufacturing efficiency and the need to maintain appropriate control. Finally, we will comment on future requirements of metrology and process equipment to enable more widespread use of on-product measurements.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121099354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Abnormal trend detection of sequence-disordered data using EWMA method [wafer fabrication] 基于EWMA方法的序列无序数据异常趋势检测[晶圆制造]

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.557991

Jr-Min Fan, R. Guo, Shi-Chung Chang, Jian-Huei Lee

引用次数: 9

Reduction of shorts between polysilicon word lines on a 4 Meg DRAM product 减少4兆DRAM产品多晶硅字线之间的短路

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1900-01-01 DOI: 10.1109/ASMC.1996.558020

J. Todoroff

引用次数: 0

Exposure field matching of multiple step-and-scan systems to multiple step-and-repeat systems 多个步进扫描系统与多个步进重复系统的曝光场匹配

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1900-01-01 DOI: 10.1109/ASMC.1996.558017

J. Pellegrini, J. Sturtevant, K. Green, P. Becher

引用次数: 1

Strategies for high energy ion implant 高能离子注入的策略

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1900-01-01 DOI: 10.1109/ASMC.1996.558002

J. Kawski, J. Borland, J. P. O'connor

引用次数: 0

Contact etch in the LAM 4520XL using standard CF/sub 4//CHF/sub 3/ chemistry 在LAM 4520XL中使用标准的CF/sub 4//CHF/sub 3/化学接触蚀刻

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1900-01-01 DOI: 10.1109/ASMC.1996.557994

T. Tran-Quinn, S. Johnston, R. Lindquist

引用次数: 0