减少4兆DRAM产品多晶硅字线之间的短路

J. Todoroff
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引用次数: 0

摘要

一组工艺和诊断工程师在多晶硅水平上显著减少了缺陷。本文将描述该方法。缺陷测试现场的电气测量与表面颗粒计数器数据和自动光学检查一起使用,以了解问题并确定各种行动的成功。在氧化、多晶硅沉积、退火、光刻和RIE操作方面进行了改进。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Reduction of shorts between polysilicon word lines on a 4 Meg DRAM product
A significant reduction in defects in a polysilicon level was achieved by a team of process and diagnostic engineers. This paper will describe the methodology. Electrical measurements on a defect test site were used together with surface particle counter data and automated optical inspection to understand the problems and determine the success of various actions. Improvements were made at the oxidation, polysilicon deposition, anneal, photolithography, and RIE operations.
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