[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium最新文献

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Determination of appropriate thermal transport properties for electronics applications 电子应用中适当热输运特性的测定
R. Tye, A. Maesono
{"title":"Determination of appropriate thermal transport properties for electronics applications","authors":"R. Tye, A. Maesono","doi":"10.1109/STHERM.1992.172865","DOIUrl":"https://doi.org/10.1109/STHERM.1992.172865","url":null,"abstract":"A new technique based on AC calorimetry has been developed to measure the thermal diffusivity and specific heat of specimens less than 0.3 mm thick over a broad temperature range. Examples of its application, for various material types and layer composites used in electronic applications, are provided and discussed. Current improvements in the technique to enable measurements to be made on fibers and wires are discussed.<<ETX>>","PeriodicalId":301455,"journal":{"name":"[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128208839","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Re-entrant cavity heat sinks formed by anisotropic etching and silicon direct wafer bonding 由各向异性蚀刻和硅直接晶圆键合形成的可入腔散热片
A. Goyal, R. Jaeger, S. Bhavnani, C. Ellis, N. Phadke, M. Azimi-Rashti, J. Goodling
{"title":"Re-entrant cavity heat sinks formed by anisotropic etching and silicon direct wafer bonding","authors":"A. Goyal, R. Jaeger, S. Bhavnani, C. Ellis, N. Phadke, M. Azimi-Rashti, J. Goodling","doi":"10.1109/STHERM.1992.172863","DOIUrl":"https://doi.org/10.1109/STHERM.1992.172863","url":null,"abstract":"A silicon re-entrant cavity heat sink for enhanced liquid cooling of silicon multichip packages can be fabricated using a two-step anisotropic etching process, followed by silicon direct wafer bonding. The authors report a novel method of formation of such re-entrant cavities using silicon integrated circuit processing. Cavity mouth openings ranging from 500 to 7.5 mu m have been batch fabricated with the two-step process. The re-entrant cavities suppress the temperature overshoot normally associated with the transition between the free convection and nucleate boiling regimes of liquid immersion cooling. It was observed that boiling occurs at heat fluxes below 2 W/cm/sup 2/.<<ETX>>","PeriodicalId":301455,"journal":{"name":"[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122304448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Using a thermal simulation model to interpret test data (air cooling of circuit boards) 使用热模拟模型解释测试数据(电路板风冷)
K. Azar, V. Manno
{"title":"Using a thermal simulation model to interpret test data (air cooling of circuit boards)","authors":"K. Azar, V. Manno","doi":"10.1109/STHERM.1992.172845","DOIUrl":"https://doi.org/10.1109/STHERM.1992.172845","url":null,"abstract":"The concurrent utilization of testing and simulation models is advocated as a means of improving the thermal characterization process. One such model based upon a combination of integral energy and momentum balances and local thermal networks is described. The general process of data interpretation using a simulation model is outlined as a series of guidelines. The process is illustrated through a series of tests involving air-cooling of boards with regular and irregular component layouts. Specific sensitivities tested included component powering, component height, and arrangement heterogeneity. The treatments of the convective heat transfer coefficient and the flow split among component flow channels were found to be the most important sensitivities in these tests. Using simulation models is considered to reduce uncertainties in estimating adiabatic heat transfer correlations. Recommendations and guidance are provided for an innovative approach to thermal characterization using existing technology.<<ETX>>","PeriodicalId":301455,"journal":{"name":"[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132623601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Compact liquid cooling system for small, moveable electronic equipment 紧凑的液体冷却系统,适用于小型移动电子设备
T. Lee, J. Andrews, P. Chow, D. Saums
{"title":"Compact liquid cooling system for small, moveable electronic equipment","authors":"T. Lee, J. Andrews, P. Chow, D. Saums","doi":"10.1109/STHERM.1992.172864","DOIUrl":"https://doi.org/10.1109/STHERM.1992.172864","url":null,"abstract":"A compact liquid cooling system has been evaluated in a benchmark of self-contained heat exchanger units that fit within small movable electronic equipment, such as PCs and workstations. The compact cooling system connects to a multichip module package via a pair of flexible stainless steel hoses. The system contains a fluid expansion chamber, a liquid-to-air heat exchanger core, a fan, and a pump and can operate entirely sealed. Pressures, package power dissipation, flow rate, and temperatures were recorded. The coolant liquid chosen for use in this system was 3M Fluorinert type FC-72, a chemically inert dielectric liquid. The 5.5 liter prototype system delivers 1.1 liter/min of FC-72. Test results showed the unit can remove up to 274 W of power dissipated with a 52 degrees C temperature difference between inlet liquid and air with a thermal resistance of 0.19 degrees C/W. Design improvements for a second generation system are proposed.<<ETX>>","PeriodicalId":301455,"journal":{"name":"[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114593907","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Development and application of test chips and test systems for the thermal characteristics of IC packaging technologies 集成电路封装技术热特性测试芯片和测试系统的开发和应用
S. Mathúna, Liu Daguang
{"title":"Development and application of test chips and test systems for the thermal characteristics of IC packaging technologies","authors":"S. Mathúna, Liu Daguang","doi":"10.1109/STHERM.1992.172867","DOIUrl":"https://doi.org/10.1109/STHERM.1992.172867","url":null,"abstract":"The authors report on the development and application of test chips and computerized test systems for the steady state and transient thermal characterization of IC packaging technologies. The steady state test system is discussed in terms of the temperature sensor calibration algorithm and the error budget associated with junction-to-case thermal resistance measurements in an oven environment. Accuracy and repeatability figures of +or-18% and +or-4% respectively have been obtained for an oven-based junction-to-case thermal resistance test method. By a comparison with infrared thermal imaging, the use of the average junction temperature is shown to provide an accurate thermal resistance figure for conventional IC package structures.<<ETX>>","PeriodicalId":301455,"journal":{"name":"[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126280813","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
The application of two-phase push-pull cooling module in pin-fin array electronic device 两相推挽式冷却模块在引脚鳍阵列电子器件中的应用
Chao Yu-Lin, Chao Fang-Lin
{"title":"The application of two-phase push-pull cooling module in pin-fin array electronic device","authors":"Chao Yu-Lin, Chao Fang-Lin","doi":"10.1109/STHERM.1992.172844","DOIUrl":"https://doi.org/10.1109/STHERM.1992.172844","url":null,"abstract":"A two-phase push-pull cooling module has been developed for cooling a pin-fin array electronic device. The measured results indicate that when the pin-fin array density is increased the performance of the push-pull module is better than that of traditional forced convection. It was also found that in forced convection cooling the temperature in the downstream region is much higher than that of the front region. In comparison, the temperature distribution in the two-phase push-pull cooling module is quite uniform.<<ETX>>","PeriodicalId":301455,"journal":{"name":"[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"147 11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129906737","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A thermal evaluation of multichip module (MCM) materials and designs 多晶片模组(MCM)材料与设计之热评估
M. Kuhlman, H. Sehitoglu
{"title":"A thermal evaluation of multichip module (MCM) materials and designs","authors":"M. Kuhlman, H. Sehitoglu","doi":"10.1109/STHERM.1992.172858","DOIUrl":"https://doi.org/10.1109/STHERM.1992.172858","url":null,"abstract":"The authors discuss the thermal performance of multichip module (MCM) materials and designs. Particular emphasis is placed on the effects of polyimide lamination and various substrate materials. Because of the thermal characteristics of these new materials and designs selected in MCMs, a thermal study was performed comparing various assembly techniques and substrate materials available. Initial modeling was done comparing the heat removed from an MCM die by conduction, convection, and radiation. Wire bond, tape automated bonding, and flip-chip attachment were compared. Subsequent modeling was performed to more accurately predict heat removed by conduction. Test circuits were built to evaluate the thermal performance of alternate substrate materials and to verify the accuracy of previous conduction models.<<ETX>>","PeriodicalId":301455,"journal":{"name":"[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131897437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Thermal design of parallel plate heat sinks for electronic packages: a parametric study 电子封装平行板散热器的热设计:参数化研究
T. M. Anderson
{"title":"Thermal design of parallel plate heat sinks for electronic packages: a parametric study","authors":"T. M. Anderson","doi":"10.1109/STHERM.1992.172846","DOIUrl":"https://doi.org/10.1109/STHERM.1992.172846","url":null,"abstract":"Summary form only given. The author describes a methodology for the design of parallel plate heat sinks and presents a parametric study of the effect of geometrical and flow variations on thermal performance. The overall thermal resistance and pressure drop of the heat sink were determined based on variations in the driving temperature difference, coolant flowrate and properties and the fin material, height, pitch, and width. Some combinations of geometrical and hydrodynamic conditions display a highly nonlinear relationship between optimal flowrate and input power. Validation of the modeling method is addressed by the comparison of the predicted performance to experimental data found in the literature. Two general cases are considered; the optimal design point for an air cooled multichip module and the performance limit of a liquid cooled heat sink attached to an individual high powered chip.<<ETX>>","PeriodicalId":301455,"journal":{"name":"[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117275332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Simulation of electrothermal interactions in power integrated circuits 功率集成电路中电热相互作用的仿真
L. Hébrard, G. Jacquemod, B. Boutherin, M. Le Helley
{"title":"Simulation of electrothermal interactions in power integrated circuits","authors":"L. Hébrard, G. Jacquemod, B. Boutherin, M. Le Helley","doi":"10.1109/STHERM.1992.172854","DOIUrl":"https://doi.org/10.1109/STHERM.1992.172854","url":null,"abstract":"The authors present SETIPIC, a software package which couples electric and thermal simulations to forecast the electrothermal interactions in the first design steps of power integrated circuits. To give a consistent interface to the designer, SETIPIC is integrated in the EDGE CAD system PICMOST, the thermal simulator used by SETIPIC to obtain the thermal distribution on the layout surface in a transient or stationary mode, is also described. It takes into account the chip environment by the connection of different thermal networks, and uses an automatic mesh method to handle the layout configurations. An infrared experimental method is described to characterize the thermal distribution on a chip. This system was used to validate PICMOST. Some simulation results are given.<<ETX>>","PeriodicalId":301455,"journal":{"name":"[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124704156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Thermal analysis and modelling of a copper-polyimide thin-film-on-silicon multichip module packaging technology 铜-聚酰亚胺薄膜-硅多芯片模块封装技术的热分析与建模
D. W. Snyder
{"title":"Thermal analysis and modelling of a copper-polyimide thin-film-on-silicon multichip module packaging technology","authors":"D. W. Snyder","doi":"10.1109/STHERM.1992.172857","DOIUrl":"https://doi.org/10.1109/STHERM.1992.172857","url":null,"abstract":"The author describes the use of experimentation and finite element modeling to investigate the thermal performance of a copper-polyimide thin-film-on-silicon technology. A thermal test module having a large number of internal and external temperature sensors was used to assess temperature gradients across the die, solder bumps, polyimide, and silicon substrate. Issues related to solder bump and via geometry solder bump arrangement, heat spreading in the silicon substrate and heat transfer to the next packaging level are considered to provide an understanding of heat transfer limitations from the active side of flip-chip devices in thin-film-on-silicon multi-chip modules.<<ETX>>","PeriodicalId":301455,"journal":{"name":"[1992 Proceedings] Eighth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131658412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
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