Thermal analysis and modelling of a copper-polyimide thin-film-on-silicon multichip module packaging technology

Abstract

The author describes the use of experimentation and finite element modeling to investigate the thermal performance of a copper-polyimide thin-film-on-silicon technology. A thermal test module having a large number of internal and external temperature sensors was used to assess temperature gradients across the die, solder bumps, polyimide, and silicon substrate. Issues related to solder bump and via geometry solder bump arrangement, heat spreading in the silicon substrate and heat transfer to the next packaging level are considered to provide an understanding of heat transfer limitations from the active side of flip-chip devices in thin-film-on-silicon multi-chip modules.<>