72nd Device Research Conference最新文献_第5页

72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872325

P. P. Manik, Ravi K. Mishra, U. Ganguly, S. Lodha

引用次数: 0

Conductance of graphene: Role of metal contact, charge puddles and differential gating 石墨烯的电导率:金属接触、电荷坑和差动门控的作用

72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872305

R. Sajjad, F. Tseng, Avik W. Ghosh

{"title":"Conductance of graphene: Role of metal contact, charge puddles and differential gating","authors":"R. Sajjad, F. Tseng, Avik W. Ghosh","doi":"10.1109/DRC.2014.6872305","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872305","url":null,"abstract":"We demonstrate how several experiments on graphene transport can be explained semi-quantitatively within a Non-Equilibrium Green's Function (NEGF) formalism. The key features are controlled by-(i) the boundary potential established at a metal-graphene interface,(ii) charge puddles that help the conductivity in the ballistic limit and hurt in the diffusive limit and (iii) alignment of the local Dirac points in a multiply gated segment. Simulations reveal that at the ballistic limit, the conductance depends on the aspect ratio which controls tunneling from source to drain and across the metal-graphene interface. We show that the boundary potential VB at the interface together with Metal Induced Doping (MID) are critical to graphene transport-specifically, the maximum conductance achievable with a given metal contact, the electron-hole asymmetry (EHA) and the peak device resistance. The boundary potential is formed due to in-plane charge transfer from metal covered graphene to graphene on substrate [1] and may produce an additional smooth pn junction, typically ignored in existing models. In the experiments however, the contact resistance heavily depends on the fabrication procedure [2], varying from hundreds of Ω- μm to several thousands of Ω- μm [3]. A rigorous model of the performance limits of several contacts and change of carrier transport from ballistic to diffusive regime is lacking. We report the upper limit of the performance of various metal-graphene contacts and compare with the best available experimental values. To reach experimental dimensions, we use tight-binding real space calculations as well as the powerful KSF-RGFA approach (combination of K Space Formalism (KSF) and Recursive Green's Function Algorithm (RGFA) [4]), which allows us to simulate devices as large as microns in size.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130572942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Lateral energy band engineering of Al2O3/III-nitride interfaces Al2O3/ iii -氮化物界面的横向能带工程

72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872332

Ting‐Hsiang Hung, P. Park, S. Krishnamoorthy, D. Nath, S. Bajaj, S. Rajan

{"title":"Lateral energy band engineering of Al2O3/III-nitride interfaces","authors":"Ting‐Hsiang Hung, P. Park, S. Krishnamoorthy, D. Nath, S. Bajaj, S. Rajan","doi":"10.1109/DRC.2014.6872332","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872332","url":null,"abstract":"In this work, we have used electrostatic engineering of the ALD dielectric/III-nitride interface to do lateral band engineering in a III-nitride HEMT. Due to challenges related to dopant activation and damage anneal, traditional ion implantation and diffusion techniques for lateral band engineering that are commonly used in other semiconductors, cannot be applied easily in the III-nitride system. We have developed an alternate method that uses surface fixed charges to engineer lateral energy band profiles, and used this to demonstrate an enhancement-mode AlGaN/GaN HEMT without any gate recess. Metal-insulator-semiconductor high electron mobility transistors (MISHEMTs) based on the III-Nitride system can efficiently suppress gate leakage enabling lower gate-channel spacing for high frequency transistors, and low off-state leakage for power switching devices. Conventional normally-off MISHEMTs require precise etching control for recess gate [1] or heavy p+ doping for the junction gate [2]. However, plasma etching may induce variation of electrical characteristics caused by surface damage while p-doping can cause hysteresis. In this work, we show a new technique to achieve normally off AlGaN/GaN transistors. Our method exploits the interface properties of dielectric/III-nitride, where a high density of fixed charges of the order of 1 μC/cm2 can be formed the interface of atomic layer deposited (ALD) dielectrics on GaN and AlN[3-5]. In this work, we use the combination of oxygen plasma and post metallization anneal (PMA) treatments to engineer the Al2O3/AlGaN (AlN) interface fixed charges. Based on this technology, lateral energy band engineering by patterning ALD Al2O3 is demonstrated. This technology provides a new approach to recess-free and doping-free normally-off MOSFETs /MISHEMTs.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133318298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

High mobility InGaZnO thin film transistor using narrow-bandgap titanium-oxide semiconductor as channel capping layer 采用窄带隙氧化钛半导体作为沟道封盖层的高迁移率InGaZnO薄膜晶体管

72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872320

H. Hsu, P. Chiou, Y. Chiu, S. Yen, C. Chang, C. H. Cheng

{"title":"High mobility InGaZnO thin film transistor using narrow-bandgap titanium-oxide semiconductor as channel capping layer","authors":"H. Hsu, P. Chiou, Y. Chiu, S. Yen, C. Chang, C. H. Cheng","doi":"10.1109/DRC.2014.6872320","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872320","url":null,"abstract":"Metal-oxide InGaZnO thin-film transistors (IGZO TFTs) have received substantial attention as potential substitutes for amorphous Si and/or polycrystalline Si in active-matrix liquid-crystal displays, active-matrix organic light emitted diodes (AMOLEDs), and three-dimensional (3D) display applications [1]-[2]. It is well known that the multi-alloy IGZO channel plays an important role in device characteristics such as subthreshold swing (SS) and field-effect mobility (μFE). Although the high-K gate dielectrics to lower operating voltage and threshold voltage (VT) of TFT devices have demonstrated [3]-[5], these critical issues on transfer characteristics still need to be overcome. The large SS and low μFE prevent them from being applied in fast-switching and high-resolution displays. In this paper, we demonstrate high mobility IGZO TFT with titanium oxide (TiOx) channel capping layer. Large μfe of 66 cm2/Vs and low SS of 79 mV/dec were achieved using narrow-bandgap TiOx (Eg~ 3.1eV) [6] with optimized 5-nm thickness. The similar bandgap and conduction band offset to those of IGZO are favorable to obtain a low resistance ohmic contact between amorphous IGZO and Al contact metals.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134395580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Reflection spectromicroscopy for the design of nanopillar optical antenna detectors 反射光谱显微镜用于纳米柱光学天线探测器的设计

72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872354

Alan C. Farrell, P. Senanayake, C. Hung, M. Currie, D. Huffaker

引用次数: 2

Epitaxial rare earth oxide (EOx) FinFET: A variability-resistant Ge FinFET architecture with multi VT 外延稀土氧化物(EOx) FinFET:具有多VT的抗变Ge FinFET架构

72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872315

S. Mittal, S. Kurude, S. Dutta, P. Debashis, S. Ganguly, S. Lodha, A. Laha, U. Ganguly

{"title":"Epitaxial rare earth oxide (EOx) FinFET: A variability-resistant Ge FinFET architecture with multi VT","authors":"S. Mittal, S. Kurude, S. Dutta, P. Debashis, S. Ganguly, S. Lodha, A. Laha, U. Ganguly","doi":"10.1109/DRC.2014.6872315","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872315","url":null,"abstract":"Band to band tunneling (BTBT) is a major challenge in Ge FinFETs due to its smaller band gap. Reduction in BTBT by quantum-confinement (QC) based increase in band-gap requires narrow Wfin. However, Line Edge Roughness (LER) on narrow fins causes large VT variability. Improved fin-width process e.g. SADP [1], ALE [2] have been proposed to reduce LER. Alternatively, variability resistant transistor design has been recently proposed with thin Ge on Si highly retrograde doped fins by our group [3], which also provides multiple VT capability - a major challenge in FinFETs. However, this has 2 challenges - (i) thickness limitation of <; 2nm of defect-free Ge on Si and (ii) RDF in the retrograde doped fins. In this study, we propose a dual-gate structure like FinFET by epitaxially growing undoped Ge /rare earth oxide (e.g. Gd2O3) [4] stack on highly doped Si fins. By statistical simulations, we show that this structure can reduce LER based variability by more than 90% in comparison to FinFETs at a similar performance. RDF is negligible due to the undoped Ge channel. Thicker (>2nm) defect-free Ge can be grown epitaxially on Gd2O3 [4]. We show the multi-VT capability enabled by independent back-gate biasing, and hence provides a significant advantage over FinFETs. Experimental data from MOSCAP with epi Gd2O3 as gate dielectric (~ 4.5 nm) show lower leakage currents than LSTP specification.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"2013 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125893458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Tin disulfide (SnS2) thin-film field-effect transistors 二硫化锡(SnS2)薄膜场效应晶体管

72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872400

U. Zschieschang, Tanja Holzmann, B. Lotsch, H. Klauk

{"title":"Tin disulfide (SnS2) thin-film field-effect transistors","authors":"U. Zschieschang, Tanja Holzmann, B. Lotsch, H. Klauk","doi":"10.1109/DRC.2014.6872400","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872400","url":null,"abstract":"Tin disulfide (SnS2) is a layered metal dichalcogenide semiconductor [1]. Its crystal structure and many of its electrical, optical and catalytic properties are similar to those of molybdenum disulfide (MoS2) [2] which has received significant attention due to the large electron mobilities of over 500 cm2/Vs that have been measured in monolayer MoS2 field-effect transistors (FETs) [3]. A potential advantage of SnS2 over MoS2 is its larger bandgap (2.3 eV for bulk SnS2 [1], compared to 1.2 eV for bulk MoS2 [2]), which may translate into smaller leakage currents and larger on/off ratios in FETs, especially when the channel length is small and the applied drain-source voltage is large. Recently, Song et al. reported an electron mobility of 50 cm2/Vs for FETs based on mechanically exfoliated SnS2 monolayers [4]. These monolayer FETs showed a subthreshold swing of 10 V/decade and a promising on/off ratio of 105, but similar to many metal dichalcogenide FETs reported in the literature, this large on/off ratio was obtained only when the applied drain-source voltage was very small (0.01 V). In addition, the FETs had a negative threshold voltage. However, for many applications, such as active-matrix displays and low-power logic circuits, positive threshold voltages and large on/off ratios at large drain-source voltages are more desirable. Here we demonstrate FETs based on mechanically exfoliated SnS2 multilayers with a thickness of several hundred nanometers that have relatively small field-effect mobilities (0.04 cm2/Vs), but provide a steep subthreshold swing (4 V/decade) and a large on/off ratio (106) even when the applied drain-source voltages are quite large (10 V).","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126079300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

35 nm-Lg raised S/D In0.53Ga0.47As quantum-well MOSFETs with 81 mV/decade subthreshold swing at VDS=0.5 V 35 nm-Lg在VDS=0.5 V时提高了S/D为0.53 ga0.47 as的量子阱mosfet，其亚阈值摆幅为81 mV/ 10

72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872378

Sanghoon Lee, Cheng-Ying Huang, D. Elias, B. Thibeault, W. Mitchell, V. Chobpattana, S. Stemmer, A. Gossard, M. Rodwell

{"title":"35 nm-Lg raised S/D In0.53Ga0.47As quantum-well MOSFETs with 81 mV/decade subthreshold swing at VDS=0.5 V","authors":"Sanghoon Lee, Cheng-Ying Huang, D. Elias, B. Thibeault, W. Mitchell, V. Chobpattana, S. Stemmer, A. Gossard, M. Rodwell","doi":"10.1109/DRC.2014.6872378","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872378","url":null,"abstract":"Recently, InAs or In-rich InGaAs (In>53%) has been widely studied as the channel material for III-V FETs due to its superior electron transport properties over In0.53Ga0.47As. These materials provide excellent on-state characteristics, e.g. >2.5 mS/μm peak transconductanc (gm) at VDS=0.5 V [1-3]. The narrow bandgap in these materials, however, causes band-to-band tunneling (BTBT) in the high drain-field region even at relatively low supply voltage of 0.5 V, thus resulting in high leakage at the off-state [1][3]. In our previous work, in order to address this issue, we incorporated a vertical spacer between the channel and N+ source/drain (S/D) to accommodate the depletion region near the channel-drain junction. The spacer significantly improved off-state characteristics such as off-state leakage, drain-induced barrier lowering (DIBL), and subthreshold swing (SS) without increasing the device footprint [3], [4]. In this work, by adopting a ~4 nm-thick In0.53Ga0.47As channel instead of a thick InAs channel, we have further improved the off-state characteristics at high VDS and achieved 81 mV/dec. minimum subthreshold swing (SSmin) for a 35 nm-Lg device at VDS=0.5 V and 385 μA/μm on-current (Ion) at 100 nA/μm off-current (Ioff) and VDD=0.5 V, which are the best SSmin and Ion from all reported In0.53Ga0.47As channel FETs.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129247425","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Impact of argon-ambient annealing in hafnium oxide Resistive Random Access Memory 氩气环境退火对氧化铪电阻性随机存取存储器的影响

72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872323

J. Capulong, B. Briggs, N. Cady

引用次数: 1

Double-gate ZnO TFT active rectifier 双栅ZnO TFT有源整流器

72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872401

K. G. Sun, T. Jackson

引用次数: 0