35 nm-Lg raised S/D In0.53Ga0.47As quantum-well MOSFETs with 81 mV/decade subthreshold swing at VDS=0.5 V

Abstract

Recently, InAs or In-rich InGaAs (In>53%) has been widely studied as the channel material for III-V FETs due to its superior electron transport properties over In_0.53Ga_0.47As. These materials provide excellent on-state characteristics, e.g. >2.5 mS/μm peak transconductanc (g_m) at V_DS=0.5 V [1-3]. The narrow bandgap in these materials, however, causes band-to-band tunneling (BTBT) in the high drain-field region even at relatively low supply voltage of 0.5 V, thus resulting in high leakage at the off-state [1][3]. In our previous work, in order to address this issue, we incorporated a vertical spacer between the channel and N+ source/drain (S/D) to accommodate the depletion region near the channel-drain junction. The spacer significantly improved off-state characteristics such as off-state leakage, drain-induced barrier lowering (DIBL), and subthreshold swing (SS) without increasing the device footprint [3], [4]. In this work, by adopting a ~4 nm-thick In_0.53Ga_0.47As channel instead of a thick InAs channel, we have further improved the off-state characteristics at high V_DS and achieved 81 mV/dec. minimum subthreshold swing (SS_min) for a 35 nm-L_g device at V_DS=0.5 V and 385 μA/μm on-current (I_on) at 100 nA/μm off-current (I_off) and V_DD=0.5 V, which are the best SS_min and I_on from all reported In_0.53Ga_0.47As channel FETs.