2016 International SoC Design Conference (ISOCC)最新文献

筛选
英文 中文
FPGA power estimation simulator for dynamic input data FPGA功率估计模拟器的动态输入数据
2016 International SoC Design Conference (ISOCC) Pub Date : 2016-10-01 DOI: 10.1109/ISOCC.2016.7799824
Tae-Hee You, Jeongbin Kim, Min-Jung Im, Eui-Young Chung
{"title":"FPGA power estimation simulator for dynamic input data","authors":"Tae-Hee You, Jeongbin Kim, Min-Jung Im, Eui-Young Chung","doi":"10.1109/ISOCC.2016.7799824","DOIUrl":"https://doi.org/10.1109/ISOCC.2016.7799824","url":null,"abstract":"As the availability of field-programmable gate arrays (FPGAs) increases, the importance of their power management has become crucial. For an efficient power management scheme, an accurate power estimation is required. The power consumption of FPGAs differs depending on the input, and previous power estimation methods have limitations which make it difficult to predict the input patterns which affect the power consumption of FPGA. Therefore, we propose a simulator which is able to estimate the power in consideration of input data. It estimates the power consumption more accurately at a minute level. From the result of experiment, we identify that there is a great gap on power estimation between previous methods and the proposed one.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122131252","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Normally-off power management for sensor nodes of global navigation satellite system 全球卫星导航系统传感器节点的常关电源管理
2016 International SoC Design Conference (ISOCC) Pub Date : 2016-10-01 DOI: 10.1109/ISOCC.2016.7799853
Takashi Nakada, Hiroshi Nakamura, T. Nakamoto, Toru Shimizu
{"title":"Normally-off power management for sensor nodes of global navigation satellite system","authors":"Takashi Nakada, Hiroshi Nakamura, T. Nakamoto, Toru Shimizu","doi":"10.1109/ISOCC.2016.7799853","DOIUrl":"https://doi.org/10.1109/ISOCC.2016.7799853","url":null,"abstract":"Global Navigation Satellite System (GNSS) is a well known method to detect the location. A GNSS sensor is integrated with wireless sensor nodes to know its location distributed in geographically wide area, along with some energy harvesting device such as a solar cell. However, the GNSS sensor consumes relatively larger energy and requires longer sensing time for tracing satellites everytime, compared with other sensors. Although some power-down modes are used to reduce the power consumption, such as a \"sleep-mode\" and a \"standby-mode\", accumulation of running time and waiting time power is not small enough for a smaller capacity solar cell. \"Normally-off\" is a way of computing control which aggressively powers off components of computer systems. It uses power gating mechanisms and nonvolatile memories (NVMs) to turn off the power supply component by component. We applied the Normally-off control to a wireless sensor node to achieve extra low power for a smaller solar cell. This paper describes our Normally-off Computing application to the GNSS aware sensor nodes and evaluation of the performance under solar cell power supply.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131293929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Monolithic MEMS resonator based pressure sensor and readout design 基于单片MEMS谐振器的压力传感器及读出设计
2016 International SoC Design Conference (ISOCC) Pub Date : 2016-10-01 DOI: 10.1109/ISOCC.2016.7799719
P. Chuang, K. Wen
{"title":"Monolithic MEMS resonator based pressure sensor and readout design","authors":"P. Chuang, K. Wen","doi":"10.1109/ISOCC.2016.7799719","DOIUrl":"https://doi.org/10.1109/ISOCC.2016.7799719","url":null,"abstract":"A monolithic MEMS resonator based pressure sensor and monolithically integrated with TIA (trans-impedance amplifier) readout circuitry has been fabricated in standard 1p6m AISC process. Dependence of the quality factor and ambient pressures are well known to resonator designers and it will be feasible to integrate a quality factor readout circuitry to detect ambient pressure. By measuring the sample resonator, the air pressure changes from 100 Pa to 1600 Pa, the Q factor will change from 2566 to 452 with resonant frequency in 15.4 k Hz and the readout circuit is designed accordingly. The system power consumption is 332.82 μW with 1.8 V power supply and sensitivity is 0.0203 mV per Q.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131807335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Hardware implementation of fast high dynamic range processor for real-time 4K UHD video 用于实时4K超高清视频的快速高动态范围处理器的硬件实现
2016 International SoC Design Conference (ISOCC) Pub Date : 2016-10-01 DOI: 10.1109/ISOCC.2016.7799801
Sang-Seol Lee, Eunchong Lee, Youngbae Hwang, Sung-Joon Jang
{"title":"Hardware implementation of fast high dynamic range processor for real-time 4K UHD video","authors":"Sang-Seol Lee, Eunchong Lee, Youngbae Hwang, Sung-Joon Jang","doi":"10.1109/ISOCC.2016.7799801","DOIUrl":"https://doi.org/10.1109/ISOCC.2016.7799801","url":null,"abstract":"The high dynamic range (HDR) has become very important because of the rapid increase in demand for a variety of applications. However, most of them were implemented by expensive systems due to the high complex computation for processing the real-time 4K UHD video. In the proposed hardware, the non-linear camera response function (CRF) with the area optimization of logarithmic computations has been applied to improve HDR quality. And, for embedding in Field Programmable Gate Array (FPGA), we implement a dedicated hardware using 4006 lookup table (LUT) and 21KB sized internal memory. The proposed architecture enables a real-time HDR processing with pipelining for a UHD video (8 Mega pixels) at 30 frames per second.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131153441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Prediction-based latency compensation technique for head mounted display 基于预测的头戴显示器延迟补偿技术
2016 International SoC Design Conference (ISOCC) Pub Date : 2016-10-01 DOI: 10.1109/ISOCC.2016.7799715
Song-Woo Choi, Min-Woo Seo, Suk-ju Kang
{"title":"Prediction-based latency compensation technique for head mounted display","authors":"Song-Woo Choi, Min-Woo Seo, Suk-ju Kang","doi":"10.1109/ISOCC.2016.7799715","DOIUrl":"https://doi.org/10.1109/ISOCC.2016.7799715","url":null,"abstract":"In this paper, we propose a prediction-based latency compensation system for head mounted display. Specifically, the proposed system uses a linear extrapolation of head orientations for prediction based on biological data of body. The experimental results show that the proposed system compensates a latency up to 53 milliseconds with 1.083 degrees of a minimum average error.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131238499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Software design for GUI display in the wearable device 可穿戴设备GUI显示的软件设计
2016 International SoC Design Conference (ISOCC) Pub Date : 2016-10-01 DOI: 10.1109/ISOCC.2016.7799876
Gyutae Oh, Inhye Park, Sang-Yub Lee, Jae-Jin Ko
{"title":"Software design for GUI display in the wearable device","authors":"Gyutae Oh, Inhye Park, Sang-Yub Lee, Jae-Jin Ko","doi":"10.1109/ISOCC.2016.7799876","DOIUrl":"https://doi.org/10.1109/ISOCC.2016.7799876","url":null,"abstract":"This paper presents the software design for GUI(graphic user interface) display in the wearable device. For suitable operation of the wearable device, we design overall system structure including RTOS. Also, we design GUI routine and objective-oriented library format for GUI display. Through implementing the designed software in the wearable device platform, we confirmed that the proposed architecture is operated in wearable device.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133028279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Energy-based iterative cost aggregation in depth estimation with a stereo camera 基于能量的立体相机深度估计迭代代价聚合
2016 International SoC Design Conference (ISOCC) Pub Date : 2016-10-01 DOI: 10.1109/ISOCC.2016.7799806
N. Truong, Huyk-Jae Lee
{"title":"Energy-based iterative cost aggregation in depth estimation with a stereo camera","authors":"N. Truong, Huyk-Jae Lee","doi":"10.1109/ISOCC.2016.7799806","DOIUrl":"https://doi.org/10.1109/ISOCC.2016.7799806","url":null,"abstract":"This paper presents a novel algorithm for performing an efficient cost aggregation in stereo vision. The cost aggregation is re-formulated under an iterative framework with a perspective of an energy model. The convergence of global energy is exploited to calculate the number of the iterations in cost aggregation. Experimental results show that the proposed method improves the quality of the disparity.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"10 14","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114056403","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Radio-frequency energy-harvesting IC with DC-DC converter 带DC-DC变换器的射频能量采集集成电路
2016 International SoC Design Conference (ISOCC) Pub Date : 2016-10-01 DOI: 10.1109/ISOCC.2016.7799816
D.-J. Seong, Kichang Jang, W. Hwang, H. Jeon, Joongho Choi
{"title":"Radio-frequency energy-harvesting IC with DC-DC converter","authors":"D.-J. Seong, Kichang Jang, W. Hwang, H. Jeon, Joongho Choi","doi":"10.1109/ISOCC.2016.7799816","DOIUrl":"https://doi.org/10.1109/ISOCC.2016.7799816","url":null,"abstract":"This paper presents an energy harvesting system that uses a radio frequency (RF) signal. It consists of an RF voltage multiplier-rectifier and DC-DC converter. A Dickson voltage multiplier is used as the RF voltage rectifier. A buck-boost converter is used as the DC combiner. The input frequency of the RF signal is 2.4 GHz, and the output DC voltage is programmable. The proposed harvesting system is implemented in a 0.18-um CMOS process.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128532098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 0.5V/22 μW low power transceiver IC for use in ESC intra-body communication system 用于ESC体内通信系统的0.5V/22 μW低功率收发器IC
2016 International SoC Design Conference (ISOCC) Pub Date : 2016-10-01 DOI: 10.1109/ISOCC.2016.7799738
Yuhwai Tseng, Ting-You Lin, Songwen Yau, Yingchieh Ho, C. Su
{"title":"A 0.5V/22 μW low power transceiver IC for use in ESC intra-body communication system","authors":"Yuhwai Tseng, Ting-You Lin, Songwen Yau, Yingchieh Ho, C. Su","doi":"10.1109/ISOCC.2016.7799738","DOIUrl":"https://doi.org/10.1109/ISOCC.2016.7799738","url":null,"abstract":"This paper presents an integrated transciver chip for use in electro-static coupling intra body communication. A simplified circuit model was developed to analyze the channel characteristics. A Manchester code was used to increase signal energy. In front of the receiver, an inverter-based amplifier applies to amplify the received data. Then, a Clock and Data Recovery data develops to recover the transmitted data. The chip is fabricated using UMC 0.18um CMOS process with a chip area of 0.75 × 0.7 mm2, power consumption of 22uW and a data transmission rate of 10M bit per second.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132841713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A study of the referenceless CDR based on PLL 基于锁相环的无参考CDR研究
2016 International SoC Design Conference (ISOCC) Pub Date : 2016-10-01 DOI: 10.1109/ISOCC.2016.7799779
Jihoon Kim, Y. Hwang, Yong Moon
{"title":"A study of the referenceless CDR based on PLL","authors":"Jihoon Kim, Y. Hwang, Yong Moon","doi":"10.1109/ISOCC.2016.7799779","DOIUrl":"https://doi.org/10.1109/ISOCC.2016.7799779","url":null,"abstract":"Clock data recovery (CDR) circuit is an essential component for serial data communication. S/PDIF which is one of data coding is used. The CDR based on PLL recovers clock and data of 2.8224 ~ 24.576MHz and was designed with the frequency detector (FD) to detect the frequency by using the preamble. The PLL, frequency detector (FD) and the reset circuits were used to design the refernceless CDR based on PLL. 65nm CMOS process is used in this study.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"3 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133136689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信