Proceedings of the 25th edition on Great Lakes Symposium on VLSI最新文献_第5页

Clock Skew Scheduling in the Presence of Heavily Gated Clock Networks 存在重门控时钟网络的时钟倾斜调度

Proceedings of the 25th edition on Great Lakes Symposium on VLSI Pub Date : 2015-05-20 DOI: 10.1145/2742060.2742092

Weicheng Liu, E. Salman, Can Sitik, B. Taskin

引用次数: 5

A Comparative Review and Evaluation of Approximate Adders 近似加法器的比较回顾与评价

Proceedings of the 25th edition on Great Lakes Symposium on VLSI Pub Date : 2015-05-20 DOI: 10.1145/2742060.2743760

Honglan Jiang, Jie Han, F. Lombardi

引用次数: 159

Dataline Isolated Differential Current Feed/Mode Sense Amplifier for Small Icell SRAM Using FinFET 基于FinFET的小单元SRAM数据隔离差分电流输入/模式检测放大器

Proceedings of the 25th edition on Great Lakes Symposium on VLSI Pub Date : 2015-05-20 DOI: 10.1145/2742060.2742104

B. Reniwal, V. Vijayvargiya, Pooran Singh, S. Vishvakarma, D. Dwivedi

引用次数: 5

Efficient Test Application for Rapid Multi-Temperature Testing 快速多温度测试的高效测试应用

Proceedings of the 25th edition on Great Lakes Symposium on VLSI Pub Date : 2015-05-20 DOI: 10.1145/2742060.2742064

Nima Aghaee, Zebo Peng, P. Eles

引用次数: 1

A Ternary Content Addressable Cell Using a Single Phase Change Memory (PCM) 基于单相变化存储器的三元内容可寻址单元

Proceedings of the 25th edition on Great Lakes Symposium on VLSI Pub Date : 2015-05-20 DOI: 10.1145/2742060.2742062

P. Junsangsri, F. Lombardi, Jie Han

引用次数: 8

EDA Challenges for Memristor-Crossbar based Neuromorphic Computing 记忆电阻器-交叉棒神经形态计算的EDA挑战

Proceedings of the 25th edition on Great Lakes Symposium on VLSI Pub Date : 2015-05-20 DOI: 10.1145/2742060.2743754

Beiye Liu, W. Wen, Yiran Chen, Xin Li, Chi-Ruo Wu, Tsung-Yi Ho

{"title":"EDA Challenges for Memristor-Crossbar based Neuromorphic Computing","authors":"Beiye Liu, W. Wen, Yiran Chen, Xin Li, Chi-Ruo Wu, Tsung-Yi Ho","doi":"10.1145/2742060.2743754","DOIUrl":"https://doi.org/10.1145/2742060.2743754","url":null,"abstract":"The increasing gap between the high data processing capability of modern computing systems and the limited memory bandwidth motivated the recent significant research on neuromorphic computing systems (NCS), which are inspired from the working mechanism of human brains. Discovery of memristor further accelerates engineering realization of NCS by leveraging the similarity between synaptic connections in neural networks and programming weight of the memristor. However, to achieve a stable large-scale NCS for practical applications, many essential EDA design challenges still need to be overcome especially the state-of-the-art memristor crossbar structure is adopted. In this paper, we summarize some of our recent published works about enhancing the design robustness and efficiency of memristor crossbar based NCS. The experiments show that the impacts of noises generated by process variations and the IR-drop over the crossbar can be effectively suppressed by our noise-eliminating training method and IR-drop compensation technique. Moreover, our network clustering techniques can alleviate the challenges of limited crossbar scale and routing congestion in NCS implementations.","PeriodicalId":255133,"journal":{"name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117161976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Session details: Interconnects and NoCs 会话详细信息:互连和noc

Proceedings of the 25th edition on Great Lakes Symposium on VLSI Pub Date : 2015-05-20 DOI: 10.1145/3254017

James W. Stine

引用次数: 0

Directed Self-Assembly Based Cut Mask Optimization for Unidirectional Design 单向设计中基于定向自组装的掩模优化

Proceedings of the 25th edition on Great Lakes Symposium on VLSI Pub Date : 2015-05-20 DOI: 10.1145/2742060.2742114

Jiaojiao Ou, Bei Yu, Jhih-Rong Gao, D. Pan, M. Preil, A. Latypov

{"title":"Directed Self-Assembly Based Cut Mask Optimization for Unidirectional Design","authors":"Jiaojiao Ou, Bei Yu, Jhih-Rong Gao, D. Pan, M. Preil, A. Latypov","doi":"10.1145/2742060.2742114","DOIUrl":"https://doi.org/10.1145/2742060.2742114","url":null,"abstract":"Unidirectional design has attracted lots of attention with the scaling down of technology nodes. However, due to the limitation of traditional lithography, printing the randomly distributed dense cuts becomes a big challenge for highly scaled unidirectional layout. Recently directed self-assembly (DSA) has emerged as a promising lithography technique candidate for cut manufacturing because of its ability to form small cylinders inside the guiding templates and the actual pattern size can be greatly reduced. In this paper, we perform a comprehensive study on the DSA cut mask optimization problem. We first formulate it as integer linear programming (ILP) to assign cuts to different guiding templates, targeting at minimum conflicts and line-end extensions. As ILP may not be scalable for very large size problem, we further propose a speed-up method to decompose the problem into smaller ones and solve them separately. We then merge and legalize the solutions without much loss of result quality. The proposed approaches can be easily extended to handle more DSA guiding patterns with complicated shapes. Experimental results show that our methods can significantly reduce the total number of unresolvable patterns and the line-end extensions for the targeted layouts.","PeriodicalId":255133,"journal":{"name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115915568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 16

Fine-Grained Voltage Boosting for Improving Yield in Near-Threshold Many-Core Processors 提高近阈值多核处理器成品率的细粒度电压增强

Proceedings of the 25th edition on Great Lakes Symposium on VLSI Pub Date : 2015-05-20 DOI: 10.1145/2742060.2742105

J. Kong, Arslan Munir, F. Koushanfar

引用次数: 3

Energy Efficient RRAM Spiking Neural Network for Real Time Classification 用于实时分类的高效RRAM脉冲神经网络

Proceedings of the 25th edition on Great Lakes Symposium on VLSI Pub Date : 2015-05-20 DOI: 10.1145/2742060.2743756

Yu Wang, Tianqi Tang, Lixue Xia, Boxun Li, P. Gu, Huazhong Yang, Hai Helen Li, Yuan Xie

{"title":"Energy Efficient RRAM Spiking Neural Network for Real Time Classification","authors":"Yu Wang, Tianqi Tang, Lixue Xia, Boxun Li, P. Gu, Huazhong Yang, Hai Helen Li, Yuan Xie","doi":"10.1145/2742060.2743756","DOIUrl":"https://doi.org/10.1145/2742060.2743756","url":null,"abstract":"Inspired by the human brain's function and efficiency, neuromorphic computing offers a promising solution for a wide set of tasks, ranging from brain machine interfaces to real-time classification. The spiking neural network (SNN), which encodes and processes information with bionic spikes, is an emerging neuromorphic model with great potential to drastically promote the performance and efficiency of computing systems. However, an energy efficient hardware implementation and the difficulty of training the model significantly limit the application of the spiking neural network. In this work, we address these issues by building an SNN-based energy efficient system for real time classification with metal-oxide resistive switching random-access memory (RRAM) devices. We implement different training algorithms of SNN, including Spiking Time Dependent Plasticity (STDP) and Neural Sampling method. Our RRAM SNN systems for these two training algorithms show good power efficiency and recognition performance on realtime classification tasks, such as the MNIST digit recognition. Finally, we propose a possible direction to further improve the classification accuracy by boosting multiple SNNs.","PeriodicalId":255133,"journal":{"name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114780351","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 42