2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)最新文献_第2页

Design of novel Vedic asynchronous digital signal processor core 新型吠陀异步数字信号处理器核心的设计

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926124

P. Deepthi, V. S. Chakravarthi

引用次数: 9

Design of area efficient Reed Solomon decoder 面积高效里德-所罗门解码器的设计

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926169

Samir D. Mhaske, U. Ghodeswar, G. Sarate

引用次数: 3

Multiplexer based two variables DAA 多路复用基于两个变量DAA

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926139

L. Sriraman, T. Prabakar

{"title":"Multiplexer based two variables DAA","authors":"L. Sriraman, T. Prabakar","doi":"10.1109/ICDCSYST.2014.6926139","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926139","url":null,"abstract":"In this paper, novel hardware architecture for performing point, line and edge detection using DAA is proposed. Such manipulations are vital in digital image processing applications and in the literature most of the implementations are on software platform only, especially in Matlab. Distributed Arithmetic Architecture (DAA) is widely used to implement inner product computations with fixed inputs. Conventional ROM-based DAA suffers from large ROM requirements. To reduce the memory requirement, adder based DAA uses pre-defined structure for computation. However, both the methods are suitable only if one input is constant. The proposed architecture overcomes this disadvantage. The new architecture is termed as Multiplexer based Distributed Arithmetic Architecture (MUX based DAA). The proposed architecture uses Multiplexer and DAA for inner product computations when both the inputs are variables. In addition, it reduces ROM requirement and complexity in constructing Adder based architecture for higher order inputs. The performance of the proposed architecture is compared with multiplier based implementation for 4-bit and 8-bit cases. The modules are implemented on the Cadence 180 nm technology. The MUX based DAA reduces power up to 81% and needs only 40% of area as compared to multiplier based implementation.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115618032","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Non-isolated dual output hybrid DC-DC multilevel converter for photovoltaic applications 用于光伏应用的非隔离双输出混合式DC-DC多电平变换器

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926197

M. Ranjana, N. S. Reddy, Repalle Kusala Pavan Kumar

引用次数: 23

Synthesis of Er doped Gd2O3 nanostructured materials by co-precipitation technique 共沉淀法合成掺铒Gd2O3纳米结构材料

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926179

G. Boopathi, S. G. Raj, G. R. Kumar, R. Mohan

{"title":"Synthesis of Er doped Gd2O3 nanostructured materials by co-precipitation technique","authors":"G. Boopathi, S. G. Raj, G. R. Kumar, R. Mohan","doi":"10.1109/ICDCSYST.2014.6926179","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926179","url":null,"abstract":"Rare-earth type oxides (RE2O3) are the most stable rare-earth compounds, in which optically active rare-earth ions hold typically a trivalent state. Among all the rare-earth oxides, cubic phase Gd2O3 is an excellent luminescent host material because of its low phonon energy (phonon cutoff ≈ 600 cm-1), favorable chemical durability, good thermal stability, and the ability of being easily doped with rare earth ions. Erbium doped gadolinium hydroxide (Er:Gd(OH)3) nanorods successfully were synthesized by a convenient co-precipitation technique using gadolinium nitrate hexahydrate and erbium nitrate hexahydrate chemicals as precursor materials. Ammonium hydroxide chemical was used as the alkali compound for precipitating the final products. The influences of reaction temperature and alkali compound on the formation of erbium doped gadolinium hydroxide nanorods were investigated in this article. Erbium doped gadolinium oxide (Er:Gd2O3) nanorods could be obtained by calcining the corresponding erbium doped gadolinium hydroxide counterparts at different temperatures. The phase identification, morphologies and optical behaviors of the as-prepared and annealed samples were investigated in detailed manner by using powder X-ray diffraction (XRD) pattern, scanning electron microscopy with energy dispersive X-ray (SEM/EDX), highresolution transmission electron microscopy (HRTEM) and photoluminescence (PL) spectrometry.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116023902","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Virtual simulation and embedded module of mobile phone using modified Braille display 基于改进盲文显示的手机虚拟仿真及嵌入式模块

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926202

M. Iqbal, L. Balaji, M. Jayakar, P. Gokul, R. K. Kumar, R. Jairam

{"title":"Virtual simulation and embedded module of mobile phone using modified Braille display","authors":"M. Iqbal, L. Balaji, M. Jayakar, P. Gokul, R. K. Kumar, R. Jairam","doi":"10.1109/ICDCSYST.2014.6926202","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926202","url":null,"abstract":"Mobile phone embedded with recent technologies play a major role in day to day life of everyone in the world and thus shrinking the world with the well connected network. Yet there are people who have not been able to relish and benefit from the advanced technology. One among those deprived are the visually challenged people. Therefore an attempt has been made to develop a simple user friendly and cost effective mobile phone by which the visually challenged can save the numbers, make calls, receive calls and the most important is that they can easily feel the display. Initially, the function of the mobile phone incorporated with Braille display has been virtually simulated using LabVIEW. The simulation has been performed by creating the graphical nodes of mobile phone set up in LabVIEW front panel. The simulated mobile phone incorporated with Braille display model has been implemented using PIC16F877A microcontroller and SIM-300 GSM module. The embedded hardware module of mobile phone for the visually challenged people has been validated for ease of its operation with all possible features. The details of simulation of mobile phone using LabVIEW, and embedded module have been furnished in this paper.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127544063","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Analysis of stability issues and power efficiency of symmetric and asymmetric low power nanoscaled SRAM cells 对称和非对称低功耗纳米SRAM单元的稳定性和功率效率分析

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926149

Anupreet Gupta, H. Anwer, B. Reniwal, S. Vishvakarma

引用次数: 1

Lag and anticipating synchronization in one way coupled Chua's circuit 滞后和预期同步以一种方式耦合蔡氏电路

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926128

K. Srinivasan, I. R. Mohamed

引用次数: 3

Implementation of vedic multiplier in image compression using DCT algorithm 利用DCT算法实现图像压缩中的吠陀乘法器

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926120

S. S. Kerur, Prakash Narchi, H. Kittur, V. A. Girish

{"title":"Implementation of vedic multiplier in image compression using DCT algorithm","authors":"S. S. Kerur, Prakash Narchi, H. Kittur, V. A. Girish","doi":"10.1109/ICDCSYST.2014.6926120","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926120","url":null,"abstract":"Digital multipliers are indispensable in the hardware implementation of many important functions such as DCT, IDCT, FFT etc in signal processing. This paper deals with Design and implementation of Vedic Multipler in Image Compression using DCT algorithm. The DCT (Discrete Cosine Transform) performs spatial compression of the data while IDCT performs decompression of the data. Here, matrix multiplication is one of the important step in both the transforms. Hence, to perform these computations, we introduce Vedic multiplier which is based on Urdhava Tiryakbhyam(vertical and crosswise) sutra. In this paper, we have designed DCT algorithm using Verilog and code is written in Xilinx I.S.E 7.1i version, synthesized on Xilinx Synthesis Tool (XST). We retrieved Register Transfer Logic (RTL) and the simulation results are observed on Modelsim 6.0 Simulator. These simulation results were compared with matlab simulation results. From the comparison, we see that DCT using Vedic Multiplier is efficiently implemented and the proposed Vedic multiplier significantly improves the computational speed involved in multiplication operations of the image processing. Hence, Vedic multipliers can find immense use in applications of image processing to save time and area.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131950354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

VLSI implementation of ternary gates using Tanner Tool 使用Tanner工具实现的VLSI三元门

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926187

A. Dhande, S. Narkhede, Shridhar Dudam

引用次数: 5