多路复用基于两个变量DAA

L. Sriraman, T. Prabakar
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引用次数: 0

摘要

本文提出了一种新的利用DAA进行点、线和边缘检测的硬件结构。这些操作在数字图像处理应用中是至关重要的,在文献中,大多数实现仅在软件平台上,特别是在Matlab中。分布式算术体系结构(DAA)被广泛用于实现固定输入的内积计算。传统的基于ROM的DAA需要大量的ROM。为了减少内存需求,基于加法器的DAA使用预定义的结构进行计算。然而,只有当一个输入是常量时,这两种方法才适用。所提出的体系结构克服了这一缺点。这种新架构被称为基于多路复用器的分布式算术架构(MUX based DAA)。当两个输入都是变量时,所提出的体系结构使用多路复用器和DAA进行内积计算。此外,它还降低了构建基于加法器的高阶输入体系结构的ROM需求和复杂性。在4位和8位情况下,将该架构的性能与基于乘法器的实现进行了比较。这些模块采用Cadence 180纳米技术实现。与基于乘法器的DAA实现相比,基于MUX的DAA降低了81%的功耗,只需要40%的面积。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Multiplexer based two variables DAA
In this paper, novel hardware architecture for performing point, line and edge detection using DAA is proposed. Such manipulations are vital in digital image processing applications and in the literature most of the implementations are on software platform only, especially in Matlab. Distributed Arithmetic Architecture (DAA) is widely used to implement inner product computations with fixed inputs. Conventional ROM-based DAA suffers from large ROM requirements. To reduce the memory requirement, adder based DAA uses pre-defined structure for computation. However, both the methods are suitable only if one input is constant. The proposed architecture overcomes this disadvantage. The new architecture is termed as Multiplexer based Distributed Arithmetic Architecture (MUX based DAA). The proposed architecture uses Multiplexer and DAA for inner product computations when both the inputs are variables. In addition, it reduces ROM requirement and complexity in constructing Adder based architecture for higher order inputs. The performance of the proposed architecture is compared with multiplier based implementation for 4-bit and 8-bit cases. The modules are implemented on the Cadence 180 nm technology. The MUX based DAA reduces power up to 81% and needs only 40% of area as compared to multiplier based implementation.
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