2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)最新文献_第8页

Generation of 3-dimensional power modules for high temperature applications by thermal copper coating processes 通过热镀铜工艺生成用于高温应用的三维功率模块

2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) Pub Date : 2019-12-01 DOI: 10.1109/EPTC47984.2019.9026619

A. Hensel, Christian Schwarzer, C. Merz, T. Stoll, M. Kaloudis, J. Franke

{"title":"Generation of 3-dimensional power modules for high temperature applications by thermal copper coating processes","authors":"A. Hensel, Christian Schwarzer, C. Merz, T. Stoll, M. Kaloudis, J. Franke","doi":"10.1109/EPTC47984.2019.9026619","DOIUrl":"https://doi.org/10.1109/EPTC47984.2019.9026619","url":null,"abstract":"The market of power electronics is a rapidly growing field with many new trends and technologies. Rising junction temperatures, progressive miniaturization and high demanding application environments result in increasing requirements regarding the efficiency, lifetime expectation and flexibility of modern power electronic devices. Therefore, a novel approach to adapt the 3-dimensional mechatronic integrated device (3D-MID) technology has been investigated. By combining innovative metallization processes like plasma-based coating technologies with robust substrate materials such as ceramics and superior interconnection technologies like pressureless silver-sintering, the manufacturing of highly integrated and highly efficient power modules will be evaluated. Therefore, a ceramic substrate is coated with a selective structured copper layer to generate the electric circuit path on which the bare-die components like sensors or power switches are mounted. The top-level interconnection can be generated by standard process like Al-wire bonding or even Cu-wire bonding technologies. Since the current industry standard, is almost at its limit with regards to space efficient module design and thermal management capabilities. This approach enables even the design of spatial circuit carries which allows an improved freedom of design concerning the functional integration in small spaces at harsh environments, while the usage of high performance materials and processes expands current limitations regarding as well the operating temperature and ambient temperature.","PeriodicalId":244618,"journal":{"name":"2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)","volume":"281-282 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133011211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Evaluation of Crack Propagation at the Interconnection Interface Induced by Warpage of Fan-Out Wafer-Level-Package 扇形外圆片级封装翘曲致互连界面裂纹扩展的评价

2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) Pub Date : 2019-12-01 DOI: 10.1109/EPTC47984.2019.9026606

A. Park, Jae Hak Lee, J. Song, S. Kim, Seongheum Han

引用次数: 3

A Heat Transfer Correlation for the Hollow Hybrid Fin Heat Sink Subjected to Air Impingement 空气冲击下中空混合翅片散热器的传热关系式

2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) Pub Date : 2019-12-01 DOI: 10.1109/EPTC47984.2019.9026585

Nico Setiawan Effendi, Jeong-Sik Park, B. Kim, Kyoung-Joon Kim

引用次数: 1

Numerical Investigation on Heat Transfer Enhancement with Perforated Square Micro-Pin Fin Heat Sink for Electronic Cooling Application 电子冷却用带孔方形微针翅片散热器强化传热的数值研究

2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) Pub Date : 2019-12-01 DOI: 10.1109/EPTC47984.2019.9026623

D. Gupta, P. Saha, Somnath C. Roy

{"title":"Numerical Investigation on Heat Transfer Enhancement with Perforated Square Micro-Pin Fin Heat Sink for Electronic Cooling Application","authors":"D. Gupta, P. Saha, Somnath C. Roy","doi":"10.1109/EPTC47984.2019.9026623","DOIUrl":"https://doi.org/10.1109/EPTC47984.2019.9026623","url":null,"abstract":"In this paper, heat transfer enhancement through perforated square micro-pin fins (edge = 180 microns) has been analyzed through numerical simulation. A three-dimensional model has been developed on computational fluid dynamics (CFD) to study the effect of perforation number (One, Two and three) and shape of perforation (Circular and square) on the solid square micro-pin fin heat sink. The ratio of the perforation edge/diameter to the micro-pin fin edge is taken less than 0.375 that doesn't affect the conduction rate. The staggered array is considered for the arrangement of the perforated micro-pin fin on the heat sink due to non-overlapping wakes. Copper is used as a material of the fins and the heat sink. The flow of air and heat transfer characteristics are studied numerically on ANSYS Fluent for the range of Reynolds number ($100leqtext{Re} < 650$). A constant heat flux $(dot{Q}=50 text{kWm}^{-} {}^{2})$ is applied at the bottom of the heat sink and an ambient temperature of 300K is considered. The size of the fins, the shape of the perforation and the number of perforation are counted as the prime geometric parameter for the calculation of most efficient heat sink. Thermal performance is calculated for every case and results are compared with the solid square micro-pin fins under the same working condition. Numerical results indicate that micro heat sink with perforation up to three gives better performance than the solid square micro heat sink, which shows that there is great potential to use perforated micro-pin fin heat sink for heat augmentation on electronic devices with high power density.","PeriodicalId":244618,"journal":{"name":"2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122349975","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

28 GHz one-sided directional slot array antenna for 5G application 5G应用的28ghz单面定向槽阵天线

2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) Pub Date : 2019-12-01 DOI: 10.1109/EPTC47984.2019.9026687

T. Ide, H. Kanaya

引用次数: 4

Wireless Micro Energy Harvesting Circuit for Sensor System 用于传感器系统的无线微能量采集电路

2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) Pub Date : 2019-12-01 DOI: 10.1109/EPTC47984.2019.9026709

Shunsuke Hatanaka, H. Kanaya

引用次数: 1

Mechanical property of new concept about Cu core bump formation For high reliability PKG 高可靠性PKG铜岩心凹凸形成新概念的力学性能研究

2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) Pub Date : 2019-12-01 DOI: 10.1109/EPTC47984.2019.9026666

J. Son, Haksan Jeong, S.G. Lee, Y. Lee, S. Jung

{"title":"Mechanical property of new concept about Cu core bump formation For high reliability PKG","authors":"J. Son, Haksan Jeong, S.G. Lee, Y. Lee, S. Jung","doi":"10.1109/EPTC47984.2019.9026666","DOIUrl":"https://doi.org/10.1109/EPTC47984.2019.9026666","url":null,"abstract":"Nowadays, 2D structure of PKG needs to change to 2.5D or 3D structure for high performance of PKG. The standoff property was required to prevent the Si chip damage and electrical short when solder joint is located between substrate and interposer. So, CCSB (Cu Core Solder Ball) is the most popular candidate of interconnection material for 2.5D PKG. However, controlling of plated solder composition has limitation due to difficult deposition over 3 elements by electroplating system. So, SAC305 composition was plated for CCSB product. In this paper, we studied Cu bump formation of new concept. At first, Cu bump was formed with combination with 1st reflowed solder bump and specially controlled Cu ball which is the surface treatment layer to get good wetting property of liquid solder by additional reflow. The applied solder is the Sn-2.5Ag-0.8Cu-0.05Ni-1Bi (MXT02) for high reliability. New concept Cu bump showed higher joint strength than general CCSB product. Therefore, new concept of Cu core ball will show higher reliability, easy application and more fine pitch then general CCSB product.","PeriodicalId":244618,"journal":{"name":"2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129077788","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Physical Model for Thin-Film Magnetic Inductors 薄膜磁电感器的物理模型

2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) Pub Date : 2019-12-01 DOI: 10.1109/EPTC47984.2019.9026610

Evan Sun, R. Singh, S. Raju

引用次数: 3

Reliability Study of Low Cost TSV-Free Interposer (TFI) 低成本无tsv介入器(TFI)可靠性研究

2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) Pub Date : 2019-12-01 DOI: 10.1109/EPTC47984.2019.9026704

H. Li, M. Kawano, P. S. Lim, F. Che, H. Chua

引用次数: 0

Fabrication of High Voltage Capable TSV Using Backside via Last Process and Laser Abblation of Dry Film BCB 干膜BCB的激光烧蚀和末次加工制备高电压TSV

2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) Pub Date : 2019-12-01 DOI: 10.1109/EPTC47984.2019.9026598

P. Mackowiak, M. Wilke, M. Wöhrmann, Robert Gernhard, K. Zoschke, K. Lang, Martin Scheider-Ramelow, H. Ngo

{"title":"Fabrication of High Voltage Capable TSV Using Backside via Last Process and Laser Abblation of Dry Film BCB","authors":"P. Mackowiak, M. Wilke, M. Wöhrmann, Robert Gernhard, K. Zoschke, K. Lang, Martin Scheider-Ramelow, H. Ngo","doi":"10.1109/EPTC47984.2019.9026598","DOIUrl":"https://doi.org/10.1109/EPTC47984.2019.9026598","url":null,"abstract":"The use of TSV (Through Silicon Via) technology has widely spread in the past decade. Its advantages in complexity reduction of the RDL (Redistribution Layer) and shortening the total routing length and also the reduction of total resistance of the RDL plus the possibility of higher integration lead to the successfully implementation. All these advantages are attractive for new application, which has been assembled and designed with planar technologies and wire bonding technologies before. Our target application are avalanche photo diodes, which are powered with high voltage. Standard TSV Process is designed with thin inorganic passivation liner deposition like silicon dioxide using PECVD which cannot withstand very high voltages because of breakthrough of the oxide [1]. Optical arrays with a higher pixel count cannot be unbundled in a conventional RDL anymore. The limit will be in the range of an 8x8 diode array. Making use of interposer technology this limitation can be overcome. In the presented work we used Backside Via Last TSV approach and used dry film BCB as passivation layer in the Via which has been opened using a 248 nm excimer laser. We measured the leakage current of the powered devices and observed a very low leakage currents as low as 15 pA at 160 V and a breakthrough of above 250 V","PeriodicalId":244618,"journal":{"name":"2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)","volume":"124 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115827079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3