发布求助
文献互助 智能选刊 最新文献

Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)最新文献

筛选
英文 中文
Design of mixed signal MCM-Ds using silicon circuit boards 用硅电路板设计混合信号mcm - d
Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95) Pub Date : 1995-01-31 DOI: 10.1109/MCMC.1995.512016
C.R. Hodges, D. Benson, K. Huey
{"title":"Design of mixed signal MCM-Ds using silicon circuit boards","authors":"C.R. Hodges, D. Benson, K. Huey","doi":"10.1109/MCMC.1995.512016","DOIUrl":"https://doi.org/10.1109/MCMC.1995.512016","url":null,"abstract":"MCM-D technologies can be used to meet the challenges of designing high performance mixed signal MCMs. Available MCM-D technologies offer special features such as high density wirebonding, high density interconnect, and integral passive components. These features allow designers to optimize key mixed signal performance parameters such as isolation, insertion loss, return loss, and noise. Specific design examples illustrate the impact of a specific silicon circuit board based MCM-D technology on these performance parameters.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124183450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Two-pole analysis of interconnection trees 互连树的两极分析
Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95) Pub Date : 1995-01-31 DOI: 10.1109/MCMC.1995.512012
A. Kahng, S. Muddu
{"title":"Two-pole analysis of interconnection trees","authors":"A. Kahng, S. Muddu","doi":"10.1109/MCMC.1995.512012","DOIUrl":"https://doi.org/10.1109/MCMC.1995.512012","url":null,"abstract":"We address the two-pole simulation of interconnect trees via the moment matching technique. We simulate the interconnect network by modeling the distributed lines with non-uniform m lumped segments and using the two-pole methodology. To this end, we derive new non-uniform equivalent circuits which match the general distributed line transfer function up to the second term. Using the recursive equation for the admittance of a tree, we give the exact expressions for the first and second moments of the transfer function of the interconnect tree. Our results show that delay estimates using our method are within 13% of SPICE-computed delays. As routing trees become bigger and interconnection lines become longer, e.g., in MCM design, our approach has advantages in both accuracy and simulation complexity.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128019419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 60
Impact of packaging technology on system partitioning: a case study 封装技术对系统分区的影响:一个案例研究
Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95) Pub Date : 1995-01-31 DOI: 10.1109/MCMC.1995.512018
P. Dehkordi, K. Ramamurthi, D. Bouldin, H. Davidson, P. Sandborn
{"title":"Impact of packaging technology on system partitioning: a case study","authors":"P. Dehkordi, K. Ramamurthi, D. Bouldin, H. Davidson, P. Sandborn","doi":"10.1109/MCMC.1995.512018","DOIUrl":"https://doi.org/10.1109/MCMC.1995.512018","url":null,"abstract":"This paper emphasizes concurrent consideration of the partitioning of a microelectronic circuit design into multiple dies and the selection of the appropriate packaging technology for implementation of the entire system. Partitioning a large design into a multichip package is a non-trivial task. Similarly, selection of the MCM packaging technology to accommodate a multichip solution can also be puzzling. The interdependencies of these two problems afford the opportunity to achieve a global optimum when considered concurrently. In this paper we address the partitioning/MCM technology tradeoff, their interdependency and previous work in this area. The SUN MicroSparc CPU is used as a demonstration vehicle and is partitioned for different MCM technologies. The preliminary results show that the optimum number of partitions and contents of each partition depend heavily on the choice of MCM technologies for a given application.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122315718","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Efficient smart substrates with test capabilities and on-line temperature monitoring 具有测试功能和在线温度监测的高效智能衬底
Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95) Pub Date : 1995-01-31 DOI: 10.1109/MCMC.1995.512024
H. Werkmann, B. Laquai, T. Schwederski
{"title":"Efficient smart substrates with test capabilities and on-line temperature monitoring","authors":"H. Werkmann, B. Laquai, T. Schwederski","doi":"10.1109/MCMC.1995.512024","DOIUrl":"https://doi.org/10.1109/MCMC.1995.512024","url":null,"abstract":"A methodology for testing active MCM silicon-based substrates by using boundary scan elements integrated into the carrier is presented. By optimizing the scan cell organization, the test circuitry causes no degradation of signal propagation. Tests of the bare substrate and of the assembled carrier can be accomplished efficiently. To monitor substrate and chip temperature, an on-line monitoring system is integrated into the substrate. The system is compensated for supply voltage variations and is calibrated to offset fabrication process deviations. An experimental carrier is fabricated.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"29 16","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132272085","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A low-cost MCM design topology-the interconnected mesh power system (IMPS) 一种低成本MCM设计拓扑——互联网状电源系统(IMPS)
Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95) Pub Date : 1995-01-31 DOI: 10.1109/MCMC.1995.512027
Y. Low, L. Schaper, S. Ang
{"title":"A low-cost MCM design topology-the interconnected mesh power system (IMPS)","authors":"Y. Low, L. Schaper, S. Ang","doi":"10.1109/MCMC.1995.512027","DOIUrl":"https://doi.org/10.1109/MCMC.1995.512027","url":null,"abstract":"A low-cost MCM design topology, the Interconnected Mesh Power System (IMPS), that will reduce a conventional four layer structure to only a two-layer structure and thus eliminate more than 50% of the cost has been developed and tested. Since the IMPS has its unique power distribution system and signal transmission environment, important issues on electrical performance such as, power distribution impedance, characteristic impedance, propagation delay, signal loss, and etc. have to be addressed. In this paper, the design and fabrication of the IMPS are first described, followed by the characterization of signal transmission with various power/signal/ground configurations. The power distribution system of the IMPS with decoupling capacitors attached were also compared with that of the solid power and ground planes.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132454749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Economics modelling for the determination of optimal known good die strategies 确定已知最佳模具策略的经济学模型
Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95) Pub Date : 1995-01-31 DOI: 10.1109/MCMC.1995.511997
E. Dislis, I. Jalowiecki
{"title":"Economics modelling for the determination of optimal known good die strategies","authors":"E. Dislis, I. Jalowiecki","doi":"10.1109/MCMC.1995.511997","DOIUrl":"https://doi.org/10.1109/MCMC.1995.511997","url":null,"abstract":"This paper describes an economics model based approach to determining optimal KGD strategies for multi-chip modules. The economics models are described, and a case study provided using reusable die carriers to facilitate die test and burn in. This is compared to a non-KGD approach in financial terms, using the models described.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132642441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Electromagnetic modeling and transient simulation of interconnects in high speed VLSI 高速VLSI互连的电磁建模与瞬态仿真
Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95) Pub Date : 1995-01-31 DOI: 10.1109/MCMC.1995.512010
Zhen-Hai Zhu, W. Hong, Yiyuan Chen, YunYi Wang, Jin Tao
{"title":"Electromagnetic modeling and transient simulation of interconnects in high speed VLSI","authors":"Zhen-Hai Zhu, W. Hong, Yiyuan Chen, YunYi Wang, Jin Tao","doi":"10.1109/MCMC.1995.512010","DOIUrl":"https://doi.org/10.1109/MCMC.1995.512010","url":null,"abstract":"A new technique is implemented in the method of lines to calculate the static parameters of a multilayered multiconductor system. Every dielectric layer is equivalent to a transmission line and every interface with conductors is equivalent to a current source, thus the whole structure is equivalent to a series of cascading two port networks. A bilevel waveform relaxation method is then used to compute the transient response of such a system terminated in arbitrary loads. All these are integrated into a software specially for the interconnect problems and one of its typical applications is presented.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121862521","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Moment models of general transmission lines with application to MCM interconnect analysis 一般输电线路的力矩模型及其在MCM互连分析中的应用
Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95) Pub Date : 1995-01-31 DOI: 10.1109/MCMC.1995.512020
Qingjian Yu, E. Kuh
{"title":"Moment models of general transmission lines with application to MCM interconnect analysis","authors":"Qingjian Yu, E. Kuh","doi":"10.1109/MCMC.1995.512020","DOIUrl":"https://doi.org/10.1109/MCMC.1995.512020","url":null,"abstract":"In this paper, we present new moment models for uniform, nonuniform and coupled transmission lines. The moment model of a line is simply based on the relationships between the two port currents (KCL) and the two port voltages (KVL) of the line. The parameters of the model depend on the mean values of the voltage moments and the weighted voltage moments of the line. Simple formulas are given to compute these mean values efficiently. By using such models and moment matching techniques, interconnects modeled as transmission line networks can be efficiently simulated.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"74 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114160078","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Field programmable multi-chip module (FPMCM)-an integration of FPGA and MCM technology 现场可编程多芯片模块(FPMCM)-集成了FPGA和MCM技术
Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95) Pub Date : 1995-01-31 DOI: 10.1109/MCMC.1995.512003
J. Darnauer, T. Isshiki, P. Garay, J. Ramirez, V. Maheshwari, W.W. Tai
{"title":"Field programmable multi-chip module (FPMCM)-an integration of FPGA and MCM technology","authors":"J. Darnauer, T. Isshiki, P. Garay, J. Ramirez, V. Maheshwari, W.W. Tai","doi":"10.1109/MCMC.1995.512003","DOIUrl":"https://doi.org/10.1109/MCMC.1995.512003","url":null,"abstract":"Multichip module technology can be used to dramatically increase the capability and performance of field programmable gate arrays (FPGAs) and the field programmable systems (FPS) that they are a part of. After an analysis of the key advantages that MCM technology has for FPGAs, we present the design of our first-generation silicon-on-silicon field programmable multi-chip module (FPMCM), analyze its limitations, and present some lessons learned in the development process. We conclude with a comparison of MCM-C and MCM-D technology for this application and suggest that the case for MCM-D for FPMCMs is most compelling when MCM-D is considered as a doorway to active substrate and chip-on-chip technologies.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123670810","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Electrical and thermal study of membrane multi-chip module systems 膜多芯片模块系统的电学和热学研究
Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95) Pub Date : 1995-01-31 DOI: 10.1109/MCMC.1995.512006
W. Cheng, S.S. Wong
{"title":"Electrical and thermal study of membrane multi-chip module systems","authors":"W. Cheng, S.S. Wong","doi":"10.1109/MCMC.1995.512006","DOIUrl":"https://doi.org/10.1109/MCMC.1995.512006","url":null,"abstract":"Membrane multi-chip modules (MCMs) have been fabricated to investigate both the electrical design and thermal management of advanced MCM systems. Custom bipolar interface circuits have been interconnected to CMOS VLSI chips, achieving a chip-to-chip delay of 5.6 nsec compared with 7.9 nsec for wire bonded system. Integrated decoupling capacitors and bipolar transistors were utilized to reduce power supply noise across chips by a factor of 3.2. To further decrease the thermal resistance of the systems, water has been used to provide extra heat removal paths. The thermal resistance of the systems has been decreased from 25/spl deg/C/W to 17/spl deg/C/W with the sealed water.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117240520","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信