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2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)最新文献

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An analog behavioral equivalence checking methodology for simulink models and circuit level designs 模拟行为等效检查方法的simulink模型和电路级设计
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI: 10.1109/SMACD.2015.7301712
M. O. Saglamdemir, G. Dundar, A. Sen
{"title":"An analog behavioral equivalence checking methodology for simulink models and circuit level designs","authors":"M. O. Saglamdemir, G. Dundar, A. Sen","doi":"10.1109/SMACD.2015.7301712","DOIUrl":"https://doi.org/10.1109/SMACD.2015.7301712","url":null,"abstract":"We propose a simulation-based analog equivalence checking methodology between high level Simulink models and their low level Spice counterparts. The equivalence of high and low level designs is determined by comparing a set of predefined performance parameters measured during the simulation of both models. Our methodology investigates around the optimal point of equivalency to obtain a range of input parameters for both models, where the error percentage between the performance parameters of both models is less than a specified threshold. We demonstrate the validity of our approach on three designs, an inverter, an operational amplifier, and a buck converter, where our approach proves to be an efficient tool in equivalence checking of analog circuits.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125734320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A Verilog-A model for the design of devices for fluorescence life-time measurement with CMOS SPADs Verilog-A模型用于CMOS spad荧光寿命测量器件的设计
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI: 10.1109/SMACD.2015.7301680
Á. Diéguez, O. Alonso, E. Vilella, A. Vilà
{"title":"A Verilog-A model for the design of devices for fluorescence life-time measurement with CMOS SPADs","authors":"Á. Diéguez, O. Alonso, E. Vilella, A. Vilà","doi":"10.1109/SMACD.2015.7301680","DOIUrl":"https://doi.org/10.1109/SMACD.2015.7301680","url":null,"abstract":"Point of care devices for the early diagnosis of current relavant diseases of our society require novel miniature and very effective devices. This contribution focuses on the description of behavioral models aimed to develop custom readout Application-Specific Integrated Circuits (ASICs) for the measurement of Fluorescence and Fluorescence life-time of target substances. The well suited for the ASIC development Verilog-A behavioral description language is used to describe the sensor, an ultra sensitive Single Photon Avalanche Diode (SPAD) fabricated in a conventional CMOS process, and the fluorescence signal.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129206878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Radix-2r arithmetic for FIR filter design optimization 基数-2r算法用于FIR滤波器设计优化
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI: 10.1109/SMACD.2015.7301701
A. Liacha, A. K. Oudjida, F. Ferguene
{"title":"Radix-2r arithmetic for FIR filter design optimization","authors":"A. Liacha, A. K. Oudjida, F. Ferguene","doi":"10.1109/SMACD.2015.7301701","DOIUrl":"https://doi.org/10.1109/SMACD.2015.7301701","url":null,"abstract":"Finite impulse response (FIR) filtering is an ubiquitous operation in digital signal processing systems. It is generally implemented in full-custom style due to the high-speed and low-power design requirements. The hardware design of a FIR filter is mainly dominated by the multiplier block, which is generally implemented as a network of adders, subtractors and shifters for more efficiency in speed and power. In a recent work, a fully predictable and sublinear runtime heuristic for the multiplication by a constant has been developed. It is called RADIX-2r. In this paper, RADIX-2r is applied to the FIR filter design optimization. In comparison to the existing heuristics, RADIX-2r exhibits the shortest adder-depth, leading therefore to the best results in speed and power.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"500 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123414947","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
State matrix simplification for computation of the approximate pole/zero expressions 近似极点/零点表达式计算的状态矩阵简化
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI: 10.1109/SMACD.2015.7301681
A. Gheorghe, F. Constantinescu, M. Nitescu
{"title":"State matrix simplification for computation of the approximate pole/zero expressions","authors":"A. Gheorghe, F. Constantinescu, M. Nitescu","doi":"10.1109/SMACD.2015.7301681","DOIUrl":"https://doi.org/10.1109/SMACD.2015.7301681","url":null,"abstract":"A new procedure for the state matrix simplification, used in the computation of the approximate symbolic pole/zero expressions is proposed. This procedure validates a simplification in a circuit matrix employing the error in the design point, the maximum error in all corners defined by all combinations of the extreme parameter values, and the modal assurance criterion.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128606292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A silicon-based 2.4GHz fully-differential LC-VCO: A design methodology proposal 基于硅的2.4GHz全差分LC-VCO:一种设计方法建议
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI: 10.1109/SMACD.2015.7301688
E. B. Ortega-Rosales, F. Sandoval-Ibarra, E. Becerra-Alvarez
{"title":"A silicon-based 2.4GHz fully-differential LC-VCO: A design methodology proposal","authors":"E. B. Ortega-Rosales, F. Sandoval-Ibarra, E. Becerra-Alvarez","doi":"10.1109/SMACD.2015.7301688","DOIUrl":"https://doi.org/10.1109/SMACD.2015.7301688","url":null,"abstract":"This paper presents a methodology to design voltage controlled oscillators. The usefulness of the design proposal is shown by designing a LC oscillator in a 130nm CMOS technology, intended for Bluetooth/Zigbee applications. From simulations results, when temperature varies from 0 to 100°C, power consumption ranging from 3.1mW to 3.81mW is achieved. At 3.4mW of power consumption, a phase noise of -119 dBc/Hz was obtained. In this proposal, NMOS varactors achieve a tuning range of 150MHz.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123243109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A losses-based analysis for electric vehicle wireless chargers 基于损耗的电动汽车无线充电器分析
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI: 10.1109/SMACD.2015.7301677
G. Di Capua, J. A. Aguado Sanchez, A. Triviño Cabrera, D. Fernandez Cabrera, N. Femia, G. Petrone, G. Spagnuolo
{"title":"A losses-based analysis for electric vehicle wireless chargers","authors":"G. Di Capua, J. A. Aguado Sanchez, A. Triviño Cabrera, D. Fernandez Cabrera, N. Femia, G. Petrone, G. Spagnuolo","doi":"10.1109/SMACD.2015.7301677","DOIUrl":"https://doi.org/10.1109/SMACD.2015.7301677","url":null,"abstract":"Contactless charging systems are becoming the most convenient and safest way to refill Electric Vehicles (EVs) batteries. Wireless Power Transfer (WPT) has been successfully adopted in EVs high power applications to efficiently deliver energy over a relatively large air gap. In order to predict the realistic performance of an EV wireless charger, the impact of real components tolerances and semiconductor devices losses must be considered. In this paper, a model for the analysis of the influence of semiconductor devices losses and of resonant devices parameters uncertainty is discussed. The model is validated through PSIM simulations of a 3.7kW/85kHz WPT system.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125208582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Electromagnetic susceptibility analysis of PCBs using predictive method 多氯联苯电磁磁化率的预测分析
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI: 10.1109/SMACD.2015.7301686
M. Mehri, N. Masoumi, S. Heidari
{"title":"Electromagnetic susceptibility analysis of PCBs using predictive method","authors":"M. Mehri, N. Masoumi, S. Heidari","doi":"10.1109/SMACD.2015.7301686","DOIUrl":"https://doi.org/10.1109/SMACD.2015.7301686","url":null,"abstract":"In this paper, a statistical approach is proposed for analysis of electromagnetic compatibility of printed circuit boards using trace orientation function. The board traces are one of the most responsible for radiated emission and susceptibility of the electronic system implemented on it. Trace orientation function, as a novel approach, is a random function which considers the arbitrary position and direction of traces on the board. To show the accuracy of the method, it is applied on a simple example and compared with full-wave simulation results. The moderate accuracy, predictive nature, and low computational cost of the method confirm the practicality of proposed statistical approach for electromagnetic compatibility analysis of complex modern circuit board with numerous components.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134325270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Performances analysis and optimization of micro power ring oscillator for energy scavenging applications using the contour Graph method 基于轮廓图法的能量清除微功率环振性能分析与优化
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI: 10.1109/SMACD.2015.7301690
R. Aloulou, H. Mnif, M. Loulou, F. Alicalapa, J. Lan Sun Luk
{"title":"Performances analysis and optimization of micro power ring oscillator for energy scavenging applications using the contour Graph method","authors":"R. Aloulou, H. Mnif, M. Loulou, F. Alicalapa, J. Lan Sun Luk","doi":"10.1109/SMACD.2015.7301690","DOIUrl":"https://doi.org/10.1109/SMACD.2015.7301690","url":null,"abstract":"This paper mainly focuses on performances optimization and analysis of micro power ring oscillator for energy scavenging applications in wireless sensor networks. A novel method of optimizing electrical performances (power, frequency) and geometry (transistors sizing) for CMOS ring oscillators is presented using the contour Graph method. The optimized oscillator exhibits a tuning range from 10 MHz to 100 MHz with good transient characteristics for a supply range of 0.8V to 1.6V and small size die which is difficult to get from the conventional oscillator. This frequency range is provided under low power consumption.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125389736","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Automatic generation of lightweight controllability and observability structures for analog circuits 模拟电路轻量可控和可观察结构的自动生成
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI: 10.1109/SMACD.2015.7301706
Anthony Coyette, B. Esen, Ronny Vanhooren, Wim Dobbelaere, G. Gielen
{"title":"Automatic generation of lightweight controllability and observability structures for analog circuits","authors":"Anthony Coyette, B. Esen, Ronny Vanhooren, Wim Dobbelaere, G. Gielen","doi":"10.1109/SMACD.2015.7301706","DOIUrl":"https://doi.org/10.1109/SMACD.2015.7301706","url":null,"abstract":"In this paper a method is presented to address the automatic testing of analog ICs. Based on Design-for-Testability building blocks offering extra controllability and extra observability, a test infrastructure is generated for a targeted circuit. The selection of the extra blocks and their insertion into the circuit is done automaticaly by a proposed optimization algorithm. Adopting a defect-oriented methodology, this algorithm maximizes the fault coverage and minimizes the silicon area overhead. The proposed method is applied to an industrial circuit to generate an optimal test infrastructure combining controllability and observability. The case study shows that, with a silicon area overhead of less than 10%, a fault coverage of 91% can be reached.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125917471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Multi-objective sensitivity-based optimization of analog circuits exploiting NSGA-II front ranking 基于NSGA-II前沿排序的模拟电路多目标灵敏度优化
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI: 10.1109/SMACD.2015.7301696
Omaya Bellaaj Kchaou, A. Sallem, P. Pereira, M. Fakhfakh, M. Fino
{"title":"Multi-objective sensitivity-based optimization of analog circuits exploiting NSGA-II front ranking","authors":"Omaya Bellaaj Kchaou, A. Sallem, P. Pereira, M. Fakhfakh, M. Fino","doi":"10.1109/SMACD.2015.7301696","DOIUrl":"https://doi.org/10.1109/SMACD.2015.7301696","url":null,"abstract":"This work deals with the multi-objective optimization of analog circuits by generating the Pareto front where elements are low sensitive to parameters' variations. NSGA-II is used for obtaining the non-dominated solutions. Richardson extrapolation technique is used for the in-loop optimization approach for computing partial derivatives and, thus, the solutions' sensitivity. NSGA-II Pareto fronts' intrinsic ranking is exploited for the generation of the new `low-sensitive' Pareto front. The case of the optimal sizing of a CMOS voltage follower is considered to exemplify the proposed approach.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127533937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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