Multi-objective sensitivity-based optimization of analog circuits exploiting NSGA-II front ranking

This work deals with the multi-objective optimization of analog circuits by generating the Pareto front where elements are low sensitive to parameters' variations. NSGA-II is used for obtaining the non-dominated solutions. Richardson extrapolation technique is used for the in-loop optimization approach for computing partial derivatives and, thus, the solutions' sensitivity. NSGA-II Pareto fronts' intrinsic ranking is exploited for the generation of the new `low-sensitive' Pareto front. The case of the optimal sizing of a CMOS voltage follower is considered to exemplify the proposed approach.