An analog behavioral equivalence checking methodology for simulink models and circuit level designs

Abstract

We propose a simulation-based analog equivalence checking methodology between high level Simulink models and their low level Spice counterparts. The equivalence of high and low level designs is determined by comparing a set of predefined performance parameters measured during the simulation of both models. Our methodology investigates around the optimal point of equivalency to obtain a range of input parameters for both models, where the error percentage between the performance parameters of both models is less than a specified threshold. We demonstrate the validity of our approach on three designs, an inverter, an operational amplifier, and a buck converter, where our approach proves to be an efficient tool in equivalence checking of analog circuits.