{"title":"模拟行为等效检查方法的simulink模型和电路级设计","authors":"M. O. Saglamdemir, G. Dundar, A. Sen","doi":"10.1109/SMACD.2015.7301712","DOIUrl":null,"url":null,"abstract":"We propose a simulation-based analog equivalence checking methodology between high level Simulink models and their low level Spice counterparts. The equivalence of high and low level designs is determined by comparing a set of predefined performance parameters measured during the simulation of both models. Our methodology investigates around the optimal point of equivalency to obtain a range of input parameters for both models, where the error percentage between the performance parameters of both models is less than a specified threshold. We demonstrate the validity of our approach on three designs, an inverter, an operational amplifier, and a buck converter, where our approach proves to be an efficient tool in equivalence checking of analog circuits.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"An analog behavioral equivalence checking methodology for simulink models and circuit level designs\",\"authors\":\"M. O. Saglamdemir, G. Dundar, A. Sen\",\"doi\":\"10.1109/SMACD.2015.7301712\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose a simulation-based analog equivalence checking methodology between high level Simulink models and their low level Spice counterparts. The equivalence of high and low level designs is determined by comparing a set of predefined performance parameters measured during the simulation of both models. Our methodology investigates around the optimal point of equivalency to obtain a range of input parameters for both models, where the error percentage between the performance parameters of both models is less than a specified threshold. We demonstrate the validity of our approach on three designs, an inverter, an operational amplifier, and a buck converter, where our approach proves to be an efficient tool in equivalence checking of analog circuits.\",\"PeriodicalId\":207878,\"journal\":{\"name\":\"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMACD.2015.7301712\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMACD.2015.7301712","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An analog behavioral equivalence checking methodology for simulink models and circuit level designs
We propose a simulation-based analog equivalence checking methodology between high level Simulink models and their low level Spice counterparts. The equivalence of high and low level designs is determined by comparing a set of predefined performance parameters measured during the simulation of both models. Our methodology investigates around the optimal point of equivalency to obtain a range of input parameters for both models, where the error percentage between the performance parameters of both models is less than a specified threshold. We demonstrate the validity of our approach on three designs, an inverter, an operational amplifier, and a buck converter, where our approach proves to be an efficient tool in equivalence checking of analog circuits.