{"title":"System-in-package (SiP) modules for wireless multiradio","authors":"M. Martin, H. Pohjonen","doi":"10.1109/ECTC.2006.1645831","DOIUrl":"https://doi.org/10.1109/ECTC.2006.1645831","url":null,"abstract":"Mobile devices: phones, terminals, PDAs etc. includes an increasing number of methods of cellular access, such as: GSM, WCDMA, CDMA etc. and complementary cellular wireless access such as: WLAN, BT, positioning, receiving and broadcasting capability. This paper analyzes how system in package (SiP) can be utilized in multiradio wireless access mobile devices, and what characteristics are needed in such SiPs to provide future mobile devices with wireless access. Guidelines and directions are presented to aid in the design and partitioning of SiPs. The embeddation of IC(s) die inside a SiP module interposer, the reduced need for the traditional type of shielding of the total system, and the option to include passive components with high performance requirements as SMD parts inside SiPs are options to achieve a 50% area and thickness reduction. A minimal number of implementation technologies and materials, I/Os and part count reduction by about 50 % may also result","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124067535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Combined thermal and electromigration exposure effect on SnAgCu BGA solder joint reliability","authors":"Luhua Xu, J. Pang","doi":"10.1109/ECTC.2006.1645799","DOIUrl":"https://doi.org/10.1109/ECTC.2006.1645799","url":null,"abstract":"Research of thermal, mechanical and electrical effect on lead free solder joints is very important for understanding the reliability of electronic package like BGA assemblies. Combined thermal and electromigration (EM) exposure on SnAgCu BGA solder joint reliability were reported. PBGA assemblies which were soldered on PCB board experienced thermal aging and Thermal-EM combined aging with current density of 103 to 104 A/cm2. Upon complete of the aging tests, solder were cross-sectioned and observed by scanning electron microscopy (SEM). In-situ temperature measurement were conducted on BGA packaging when the sample subject to combined thermal and EM exposure. Infrared thermal imaging system was used to determine the 2D temperature distribution in solder joint interconnects. The DC signal was passing through with a high current density of 103-104 A/cm2. Higher temperature was observed on the solder joint compared to the background. At the corner of the solder joint, the temperature increment could reach more than 100 degC when the current density is about 3times104 A/cm2. This is due the current-crowding effect at the corner and it causes higher joule heating. Since the EM phenomena at high temperature are even more significant, void process could occur first at these locations. The impact of EM on the growth of interfacial IMC in Ni/SAC/Ni and Cu/SAC/Ni solder joint was observed. It was found IMC layer growth on anode interface is faster than cathode interface, and both are faster than isothermal aging. The in-situ strain in the BGA solder joints subject to thermal-electrical loading were measured by micro digital image speckle correlation system (Micro-DISC), the system is constructed based on the principle of DISA measurement. Large shear strain was observed at the corner of the solder joint when the solder joint is subject to pure temperature ramp up. Normal strain could be seen also when current was applied","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"142 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128594901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and process optimization for dual row QFN","authors":"D. Retuta, B. K. Lim, H. Tan","doi":"10.1109/ECTC.2006.1645908","DOIUrl":"https://doi.org/10.1109/ECTC.2006.1645908","url":null,"abstract":"The continuous advancement in technology and miniaturization of electronic components, hand held and communication devices require superior thermal-electrical performance and miniature packages. An advanced and complicated Integrated Circuit (IC) device often demands increase in number of I/O's while maintaining its small size, footprint and weight. Dual Row Quad Flat No lead (DR-QFN) is an ideal solution for such demanding applications; however, despite the simplicity of its package structure, it possesses challenges in various assembly processes. This paper describes the problems that are associated with the different concepts of both `saw' and `punch' singulated DR-QFN and the corresponding solutions to overcome the barriers. Lead isolation or separation of 1st and 2nd row of leads has always been the major challenge for saw singulated DR-QFN (DR-QFN- S) where solder burr and leadfinger delamination are inherent. Shorting between inner and outer leads during SMT is also apparent. This paper demonstrates the study on different leadframe designs and how the solutions were derived. Through modeling, the impact on solder joint reliability for the different leadframe design and the respective surface mount behavior was also explored. The primary focus in designing punch singulated DR-QFN (DR-QFN-P) is to do away with lead isolation, which is to maintain its simplicity and cost effectiveness. The key factor is the design of the leadframe and the etching capability of the manufacturer. But despite the absence of lead isolation process, DR-QFN-P similarly comes with challenges such as solder bridging and lead-to-lead short. Further in this paper describes the approach taken to overcome issues associated with this package","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115953506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Novel biosensor development for monitoring children's brain tumor","authors":"R. Doraiswami, J. Kalapurakal","doi":"10.1109/ECTC.2006.1645725","DOIUrl":"https://doi.org/10.1109/ECTC.2006.1645725","url":null,"abstract":"In this paper we present our current joint work (Georgia Tech $Northwestern University) in developing diagnosis of children's brain cancer and lays down the requirements for fabricating, integrating and testing a bio compactable embedded RF cancer sensor for in vivo monitoring of the recurrence of brain tumor after treatment. The paper presents a detailed literature search on diagnosis of brain tumor. Several techniques used for the treatment and symptoms of recurrence of brain tumor is also presented. A case study done on a group of children is also presented. Through the study the parameters required for an in vivo sensor understood. Advanced bio materials and conductive polymers are used to fabricate a shape memory biosensor. The sensors response to a change in temperature and change in PhH of fluid. The sensor fabrication and its applications is in progress. The data collected till date and required improvements are presented at the conference","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115501191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Study of low-modulus die attach adhesives and molding compounds on warpage and damage of PBGA","authors":"S. Yi, P. Daharwal, Y. Lee, B. Harkness","doi":"10.1109/ECTC.2006.1645767","DOIUrl":"https://doi.org/10.1109/ECTC.2006.1645767","url":null,"abstract":"Numerical experiments based on the three-dimensional (3D) nonlinear finite element method (FEM) has been conducted to understand governing damage mechanisms during the die attachment for the ball grid array (BGA) packages. The parametric studies for various designs of the BGA package and material properties have been performed. A wide range of the modulus (1MPa~30GPa) and the coefficient of thermal expansion (CTE) (10ppm ~ 300ppm) were evaluated to see feasibility of a new class of material set in the die attach adhesive. Effects of thermo-mechanical properties, particularly glass transition temperature (Tg) of selected die attach adhesives on the damage and warpage of the die and substrate of BGA are analyzed. The warpage of substrate and Si die cracking due to the material properties of the die attach adhesive are demonstrated. Classification of modes of deformation in the BGA package with material sets will shed light on novel material development for better reliability. In addition, the optimum thermo-mechanical properties of die attachment materials and molding compounds will be selected based on the parametric studies","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115752492","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reliability analysis of SnPb and SnAgCu solder joints in FC-BGA packages with thermal enabling preload","authors":"P. Bhatti, M. Pei, Xuejun Fan","doi":"10.1109/ECTC.2006.1645711","DOIUrl":"https://doi.org/10.1109/ECTC.2006.1645711","url":null,"abstract":"Modern semiconductor devices in many applications require a thermal solution to remove the heat away from the device and maintain a certain operating temperature. These thermal solutions typically use a heat sink and a thermal interface material (e.g. thermal grease) between the device and the heat sink. A compressive load is applied to reduce the thermal resistance of the interface and facilitate better heat transfer from the device to heat sink. Depending on the magnitude, this compressive preload may affect the fatigue behavior of second level solder joints connecting the device to PCB in a thermal cycling environment. This paper describes the experimental setup and test results to evaluate the reliability of solder joints in the presence of a preload. 3-D nonlinear finite element analysis is performed to simulate the effect of compressive load in thermal cycling. Both SnPb and SnAgCu solder alloys are studied with various levels of preload","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114358155","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Power delivery design for 800MHz DDR2 memory systems in low-cost wire-bond packages","authors":"R. Schmitt, Joong-Ho Kim, D. Oh, C. Yuan","doi":"10.1109/ECTC.2006.1645651","DOIUrl":"https://doi.org/10.1109/ECTC.2006.1645651","url":null,"abstract":"This paper describes the challenges in designing supply networks of high-speed interface systems in low-cost wire-bond packages. It introduces a set of figure-of-merits for the supply noise performance of interface systems. It then demonstrates how these parameters can be used to guide the design and verification of interface power distribution networks","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127159968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"In-situ opening aligned carbon nanotube films/arrays for multichannel ballistic transport in electrical interconnect","authors":"Lingbo Zhu, D. Hess, C. Wong","doi":"10.1109/ECTC.2006.1645643","DOIUrl":"https://doi.org/10.1109/ECTC.2006.1645643","url":null,"abstract":"Carbon nanotubes (CNTs) have been proposed for applications in microelectronic applications, especially for electrical interconnects and nanodevices, due to their excellent electrical, thermal and mechanical properties. Usually, the CNTs produced by arcing, laser ablation or chemical vapor deposition (CVD) are inevitably close-ended. Due to the weak coupling of the individual walls and close ends, it leads to conclusions that only the outer wall of multi-walled CNT is contributed to the current-carrying capacity. However, recent research shows that each wall of the multi-walled CNTs contributes to the saturation current to obtain a very high current-carrying capacity, i.e., the multichannel electron transport could be achieved by opening multi-walled CNTs. The previous process to open the CNTs can't be applied to the aligned CNTs, since they will damage the original alignment of CNTs. In this paper, we for the first time report a simple process to achieve simultaneous CNT growth and opening of the CNT ends, while keeping alignment of the original CNT films/arrays. The addition of relatively low reactivity oxidizing agents (water) into the reaction furnace has been demonstrated the feasibility. The as-grown CNTs were characterized by high resolution transmission electron microscopy (HRTEM), scanning electron microscopy (SEM). Also, we proposed using CNT transfer technology, enabled by open-ended CNTs, to circumvent the high carbon nanotube (CNT) growth temperature and poor adhesion with the substrates that currently plague CNT implementation. The process is featured with separation of high-temperature CNT growth and low-temperature CNT device assembly. Field emission testing of the as-assembled CNT devices is in a good agreement with the Fowler-Nordheim (FN) equation, with a field enhancement factor of 4540. This novel technique shows promising applications for positioning CNTs on temperature-sensitive substrates, and for the fabrication of field emitters, electrical interconnects, thermal management structures in microelectronics packaging","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128161951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Davoine, M. Fendler, F. Marion, C. Louis, R. Fortunier
{"title":"Low temperature fluxless flip chip technology for fine pitch bonding","authors":"C. Davoine, M. Fendler, F. Marion, C. Louis, R. Fortunier","doi":"10.1109/ECTC.2006.1645621","DOIUrl":"https://doi.org/10.1109/ECTC.2006.1645621","url":null,"abstract":"This paper describes a flip chip technology representing a technological breakthrough compared with conventional method such as soldering or the bonding through conductive adhesives. Electrical connections are performed by the insertion of metallic micro-tips in ductile solder material. As low temperature and fluxless technology, this method is adapted to fine pitch and large devices. Here we present our technological investigations to perform electrical conductive micro-tips such as plasma etching, chemical etching, lift-off, and an innovated use of nanoimprint technology of metallic materials. Gold appears as a good choice of material for micro-tips performing, because an intermetallic phase is formed with solder materials such as tin, lead, or indium based solder and ensures the mechanical and electrical contact. Finally we present the bonding results of our test vehicle which validate the principle of the electrical connection through insertion for a 15mum pitch. The resistance value of such a connection has also been measured for a 30mum pitch","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"12377 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125855167","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Effect of environments on degradation of molding compound and wire bonds in PEMs","authors":"A. Teverovsky","doi":"10.1109/ECTC.2006.1645842","DOIUrl":"https://doi.org/10.1109/ECTC.2006.1645842","url":null,"abstract":"Degradation of wire bonds (WBs) is one of the major factors limiting reliability of plastic encapsulated microcircuits (PEMs) at high temperatures. Use of PEMs in military and aerospace applications requires extended and thorough evaluation of encapsulating materials and reliability of packages in harsh environments. However, the effect of environmental conditions on characteristics of molding compounds (MCs) and reliability of wire bonds has not been studied sufficiently to date. In this work, two types of PEMs in QFP-style packages have been stored in different environments at temperatures from 130 degC to 225 degC for up to 4,500 hours in some cases. To assess the effect of oxygen, the parts were aged at 198 degC in air and vacuum chambers. The effect of humidity was evaluated during long-term highly accelerated temperature and humidity stress testing (HAST) at temperatures of 130 degC and 150 degC. Thermo-mechanical and thermo-gravimetrical analyses were used to evaluate the effect of environment on characteristics of molding compound used. Measurements of contact resistances of wire bonds and their mechanical strength were employed to monitor degradation of wire bonds throughout the testing. Correlation between degradation of MC and WB failures has been analyzed. The effect of environmental conditions on accelerating factors of WB failures has been assessed, and the mechanism of wire bond degradation due to the presence of moisture and oxygen is discussed","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126039760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}