{"title":"A transformer-based receiver front-end for 5-GHz WLANs","authors":"E. Ragonese, A. Italia, M. Seminara, G. Palmisano","doi":"10.1109/RFIC.2006.1651180","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651180","url":null,"abstract":"In this paper a transformer-based receiver front-end for 5-GHz wireless local area networks is presented. The circuit is implemented in a low-cost 46-GHz-fT silicon bipolar process and includes a variable-gain low noise amplifier and a double-balanced mixer. The front-end does not require any external input balun for the single-ended-to-differential conversion of the RF signal, which is provided by the transformer load of the low noise amplifier. The receiver front-end exhibits a 4.3-dB noise figure and a power gain of 21 dB. By adopting a 1-bit gain control, the circuit achieves an input 1-dB compression point of -11 dBm, while drawing only 22 mA from a 3-V supply voltage. Finally, thanks to integrated notch LC filters, the front-end provides an on-chip image rejection ratio as high as 50 dB, thus reducing the required selectivity and hence the cost of the external RF filter","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125076898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Yeoh, Y. Choi, L. Guo, A. P. Popov, Kok Yin Tham, Bin Zhao, Xuesong Chen
{"title":"A 2.45-GHz RFID tag with on-chip antenna","authors":"W. Yeoh, Y. Choi, L. Guo, A. P. Popov, Kok Yin Tham, Bin Zhao, Xuesong Chen","doi":"10.1109/RFIC.2006.1651139","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651139","url":null,"abstract":"Powered exclusively by on-chip antenna, a 2.45-GHz RFID tag with RF read/write capabilities has been realized in 0.13-mum CMOS process. By eliminating external antenna, the 0.5-mm2 tag presents a low-cost alternative for achieving high-end features such as bi-directional communication, anti-collision and rewritable memory that are attainable only with off-chip solutions","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129854503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 2.4-GHz CMOS RF front-end for wireless sensor network applications","authors":"M. A. Arasu, Henry Kok Fong Ong, Y. Choi, W. Yeoh","doi":"10.1109/RFIC.2006.1651177","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651177","url":null,"abstract":"A 2.4-GHz fully-differential RF front-end on 0.18-mum CMOS technology for wireless sensor network (WSN) applications consuming 4.8-mW from a 1.8-V supply is presented. The direct conversion RF-front end comprises of low-noise amplifier (LNA), I/Q direct-conversion mixers, quadrature LO generator and LO buffers. By employing conventional source degenerated LNA, passive mixer, to eliminate flicker noise, RC poly-phase filter for quadrature LO generation, and LO buffers employing current reuse technique, we achieve 23-dB conversion gain, 8.1-dB noise figure, -15-dBm IIP3 and better than 15-dB input return loss for the RF front-end","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128463101","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sungmin Ock, Seokyong Hong, Sangwoo Han, Joonsuk Lee
{"title":"A 27.7dBm OIP3 SiGe HBT cascode LNA using IM3 cancellation technique","authors":"Sungmin Ock, Seokyong Hong, Sangwoo Han, Joonsuk Lee","doi":"10.1109/RFIC.2006.1651109","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651109","url":null,"abstract":"A 1.9GHz low noise amplifier(LNA) is implemented with SiGe BiCMOS process using a modified cascode structure. In order to achieve high linearity and low NF at the same time, the phase of IM3 (3rd order inter-modulation) in a common emitter amplifier is derived and the new IM3 cancellation method is proposed. The measurement results of the LNA at 1930MHz are gain of 16.9dB, noise figure of 1.5dB, and OIP3 of 27.7dBm with a single 2.7V supply. It consumes only 4.4mA","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128201438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An SOI CMOS, high gain and low noise transimpedance-limiting amplifier for 10Gb/s applications","authors":"F. Pera, S. Voinigescu","doi":"10.1109/RFIC.2006.1651165","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651165","url":null,"abstract":"This paper presents a low noise, high gain transimpedance-limiting amplifier (TIALA) design for 10Gb/s applications, implemented in a 0.13mum SOI CMOS technology. Powered from a single 1.5V supply and consuming 165mW, the TIALA features auto-zero DC feedback and has 25muApp input current sensitivity (an estimated -16dBm optical sensitivity) with over 40dB electrical dynamic range and 14 kOhm linear gain","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130542687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Darbanian, S. Farahani, S. Kiaei, B. Bakkaloglu, M. Smith
{"title":"Tri-mode integrated receiver for GPS, GSM 1800, and WCDMA","authors":"N. Darbanian, S. Farahani, S. Kiaei, B. Bakkaloglu, M. Smith","doi":"10.1109/RFIC.2006.1651076","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651076","url":null,"abstract":"A fully integrated direct conversion tri-mode receiver compliant with Global Positioning System (GPS), GSM1800, and WCDMA is presented. The configurable receiver consists of a wide band low noise amplifier with an on-chip matching network, Gilbert-cell mixers, and dynamically reconfigurable gm-C base-band filters. The RF and analog locks occupy 2.28 mm2 in 0.18 mum SiGe technology. The measurement results show noise figure as low as 3.2 dB for GPS and IIP3 of -18 dBm","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131909070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A novel IP2 calibration method for low-voltage downconversion mixers","authors":"K. Dufrêne, R. Weigel","doi":"10.1109/RFIC.2006.1651148","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651148","url":null,"abstract":"This paper describes a novel IP2 calibration method for double balanced current-commutating downconversion mixers. The proposed technique reduces difference between duty cycle mismatches of two switching pairs in the mixer core, being suitable especially for low-voltage monolithic downconversion mixers employing common mode feedback block in the output stage. A tunable IQ mixer prototype, fabricated in a 0.13mum RF CMOS technology and operating under low voltage supply of 1.5 V, is presented. Experimental results confirm the feasibility of the IP2 tuning technique","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133355377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SiGe integrated mm-wave push-push VCOs with reduced power consumption","authors":"R. Wanner, R. Lachner, G. Olbrich","doi":"10.1109/RFIC.2006.1651184","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651184","url":null,"abstract":"For use in automotive radar applications we have designed and fabricated several push-push VCOs within the frequency range 67 to 75 GHz. In this paper we present one of these oscillators which can be tuned from 71.3 GHz to 75.8 GHz. In this tuning range the measured output power is 3.5 it 0.4 dBm with an DC to RF efficiency eta = 1.6%. The measured single sideband phase noise is below - 105dBc/Hz at 1MHz offset frequency. With a reduced supply voltage the efficiency can be increased to eta = 3.5 % with an RF output power of 1.5 dBm. The circuits are fabricated in a production-near SiGe:C bipolar technology. The SiGe:C bipolar transistors show a maximum transit frequency fT = 200 GHz and a maximum frequency of oscillation max = 275 GHz. For the passive circuitry transmission-line components, MIM-capacitors and integrated resistors are used","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"190 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114207331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Kanaya, R. Pokharel, F. Koga, Z. Arima, S. Kim, K. Yoshida
{"title":"Design of coplanar waveguide on-chip impedance-matching circuit for wireless receiver front-end","authors":"H. Kanaya, R. Pokharel, F. Koga, Z. Arima, S. Kim, K. Yoshida","doi":"10.1109/RFIC.2006.1651134","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651134","url":null,"abstract":"Recently, spiral inductors have widely been used instead of resistors in the design of matching circuits to enhance the thermal noise performance of a wireless transceiver. However, such elements usually have low quality factor (Q) and may encounter the self-resonance in microwave-frequency band which permits its use in higher frequencies, and on the other hand, they occupy the large on-chip space. This paper presents a new design theory for the impedance-matching circuits for a single-chip SiGe BiCMOS receiver front-end for 2.4 GHz-band wireless LAN (IEEE 802.11b). The presented matching circuits are composed of conductor-backed coplanar waveguide (CPW) meanderline resonators and impedance (K) inverter. The prototype front-end receiver is fabricated and measured. A few of the measured results to verify the design theory are presented","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"165 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124635246","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Sandner, S. Derksen, D. Draxelmayr, S. Ek, V. Filimon, G. Leach, S. Marsili, D. Matveev, K. Mertens, H. Paule, M. Punzenberger, C. Reindl, R. Salerno, M. Tiebout, A. Wiesbauer, I. Winter, Z. Zhang
{"title":"MBOA/WiMedia UWB transceiver design in 0.13/spl mu/m CMOS","authors":"C. Sandner, S. Derksen, D. Draxelmayr, S. Ek, V. Filimon, G. Leach, S. Marsili, D. Matveev, K. Mertens, H. Paule, M. Punzenberger, C. Reindl, R. Salerno, M. Tiebout, A. Wiesbauer, I. Winter, Z. Zhang","doi":"10.1109/RFIC.2006.1651100","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651100","url":null,"abstract":"A highly integrated, WiMedia/MBOA compliant RF transceiver for ultra-wideband (UWB) data communication in the 3-5GHz band is presented. The design includes receiver, transmitter and fast-hopping synthesizer. It is designed in a 0.13mum standard CMOS technology for a single supply voltage of 1.5V. The receiver features a measured noise figure (NF) of 3.6 to 4.1dB over the three sub-bands. The transmitter supports a maximum TX power of 0dBm at 20 dB EVM","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121276699","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}