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IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006最新文献

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A low-power full-band 802.11abg CMOS transceiver with on-chip PA 具有片上PA的低功耗全频段802.11abg CMOS收发器
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 Pub Date : 2006-06-11 DOI: 10.1109/RFIC.2006.1651097
Shih-Chieh Yen, Ying-Yao Lin, Tzung-Ming Chen, Yung-Ming Chiu, Bin-I Chang, Ka-Un Chan, Ying-Hsi-Lin, Ming-Chong Huang, Jiun-Zen Huang, Chao-Hua Lu, Wen-Shan Wang, Che-Sheng Hu, Chao-Cheng Lee
{"title":"A low-power full-band 802.11abg CMOS transceiver with on-chip PA","authors":"Shih-Chieh Yen, Ying-Yao Lin, Tzung-Ming Chen, Yung-Ming Chiu, Bin-I Chang, Ka-Un Chan, Ying-Hsi-Lin, Ming-Chong Huang, Jiun-Zen Huang, Chao-Hua Lu, Wen-Shan Wang, Che-Sheng Hu, Chao-Cheng Lee","doi":"10.1109/RFIC.2006.1651097","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651097","url":null,"abstract":"A low-power full-band 802.11abg transceiver in 0.15mum CMOS technology is presented. It shows 4.4/4dB low noise figures in 2.4/5GHz receiver chains. An on-chip PA (power amplifier) delivers 20dBm output P 1dB -40 to 140degC operation temperature is achieved by sensing technique. On-chip power detector and transmitter to receiver feedback loop estimate I/Q imbalance, and a new I/Q compensation scheme is implemented in LO (local oscillator) rather than signal paths. It consumes 65/75mA for 2.4/5GHz receives modes and 200/107mA for 2.4/5GHz transmits modes respectively. The low power consumption, high integration and robustness make this transceiver suitable for portable applications","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127503714","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A 1.2 V reactive-feedback 3.1-10.6 GHz ultrawideband low-noise amplifier in 0.13 /spl mu/m CMOS 基于0.13 /spl mu/m CMOS的1.2 V无功反馈3.1-10.6 GHz超宽带低噪声放大器
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 Pub Date : 2006-06-11 DOI: 10.1109/RFIC.2006.1651086
M. Reiha, J. Long, J. Pekarik
{"title":"A 1.2 V reactive-feedback 3.1-10.6 GHz ultrawideband low-noise amplifier in 0.13 /spl mu/m CMOS","authors":"M. Reiha, J. Long, J. Pekarik","doi":"10.1109/RFIC.2006.1651086","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651086","url":null,"abstract":"A 15.1 dB gain, 2.1 dB noise figure (min.), low-noise amplifier (LNA) fabricated in 0.13 mum CMOS covers the entire 3.1-10.6 GHz ultrawideband (UWB). Noise figure variation across this band is limited to plusmn0.43 dB. Reactive feedback reduces the noise figure, stabilizes the gain, and sets the terminal impedances over the prescribed bandwidth. Bias current re-use limits power consumption of the 0.87mm2 IC to 9 mW from a 1.2 V supply","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124938658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 39
A fully integrated 3-band OFDM UWB transceiver in 0.25/spl mu/m SiGe BiCMOS 一个完全集成的3波段OFDM UWB收发器在0.25/spl mu/m SiGe BiCMOS
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 Pub Date : 2006-06-11 DOI: 10.1109/RFIC.2006.1651142
Jozef Reinerus Maria Bergervoet, H. Kundur, D. Leenaerts, R. V. D. Beek, Raf Roovers, G. V. D. Weide, H. Waite, S. Aggarwal
{"title":"A fully integrated 3-band OFDM UWB transceiver in 0.25/spl mu/m SiGe BiCMOS","authors":"Jozef Reinerus Maria Bergervoet, H. Kundur, D. Leenaerts, R. V. D. Beek, Raf Roovers, G. V. D. Weide, H. Waite, S. Aggarwal","doi":"10.1109/RFIC.2006.1651142","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651142","url":null,"abstract":"A fully integrated transceiver for 3-band OFDM UWB is presented. It has been implemented in a 0.25mum SiGe BiCMOS process, and has a die area of less than 4mm2. The power consumption is 47mA, 43mA, and 27mA at 2.7V supply for receiver, transmitter, and synthesizer respectively. The chip features DC offset cancellation, a loop-back test mode, a single input/output pin for antenna connection, a 1GHz baseband clock output and is robust against interferers from cellular and ISM bands. The measured EVM is 8%, while the overall NF is 4.5dB and the iIP3 is -6dBm","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123740442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Fully integrated Doherty power amplifiers for 5 GHz wireless-LANs 完全集成的多尔蒂功率放大器，用于5 GHz无线局域网
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 Pub Date : 2006-06-11 DOI: 10.1109/RFIC.2006.1651114
Daekyu Yu, Youngwoon Kim, Kichon Han, Jin-ho Shin, Bumman Kim
{"title":"Fully integrated Doherty power amplifiers for 5 GHz wireless-LANs","authors":"Daekyu Yu, Youngwoon Kim, Kichon Han, Jin-ho Shin, Bumman Kim","doi":"10.1109/RFIC.2006.1651114","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651114","url":null,"abstract":"Fully integrated Doherty amplifiers have been developed for 5 GHz wireless-LAN (WLAN) applications. Through a new Doherty power amplifier circuit topology, the bulky Doherty in/output matching block including quarter-wave (lambda/4) impedance transformer can be fully integrated using capacitors, short micro-strip lines and bonding wires. To improve efficiency at a full power, without using the bulky input power splitter, a new input power driving concept is implemented by inserting lambda/4 impedance transformers at the inputs of the carrier and peaking amplifiers using the lumped elements. The amplifier based on InGaP HBT technology, shows an output power of 22.5 dBm and a power-added efficiency (PAE) of 21.3 % at an error vector magnitude (EVM) of 5%, measured with 54 Mbps 64-QAM-OFDM signals at 5.2 GHz. The proposed in/output matching topology allows the fully integrated Doherty amplifiers with a small size","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114919531","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 37
Next-generation silicon analysis tools for RF integrated-circuits 下一代射频集成电路硅分析工具
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 Pub Date : 2006-06-11 DOI: 10.1109/RFIC.2006.1651167
A. Mehrotra, A. Narayan, R. Subramanian
{"title":"Next-generation silicon analysis tools for RF integrated-circuits","authors":"A. Mehrotra, A. Narayan, R. Subramanian","doi":"10.1109/RFIC.2006.1651167","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651167","url":null,"abstract":"This paper introduces new circuit analysis technology targeted to address the growing gap between what current circuit verification technology can deliver for today's analog and RF integrated circuit designs, compared to what is observed and measured in silicon. We present key powerful new techniques for the precise and fast analysis and verification of RF integrated circuits. We also provide an overview of the key innovations in applied mathematics, numerical techniques, and software architecture that allow high speed and precision to be delivered together in circuit analysis. These techniques, taken together, comprise precision circuit analysis technology- targeted to address the growing verification problems found in the majority of today's commercial analog/RF-rich integrated circuits. We demonstrate the application of this technology on commercially shipping designs in wireless, networking, and SoC applications","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115344063","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Linear RF polar modulated SiGe Class E and F power amplifiers 线性射频极调制SiGe类和F类功率放大器
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 Pub Date : 2006-06-11 DOI: 10.1109/RFIC.2006.1651182
J. Kitchen, I. Deligoz, S. Kiaei, B. Bakkaloglu
{"title":"Linear RF polar modulated SiGe Class E and F power amplifiers","authors":"J. Kitchen, I. Deligoz, S. Kiaei, B. Bakkaloglu","doi":"10.1109/RFIC.2006.1651182","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651182","url":null,"abstract":"Two fully-integrated linearized polar modulated class E and F power amplifiers (PA) with switch-mode supply modulation are presented. The PAs are implemented in a 0.18mum SiGe BiCMOS process and can be used to transmit varying envelope RF signals operating at 870-920MHz. The class E PA gives a peak output power of 26.4dBm and a maximum efficiency of 62%. The class F PA gives peak output power of 23dBm with 53 % drain efficiency. When using delta modulation to control the switch-mode supply, the class F and E polar amplifiers give ACPRs for an EDGE input waveform (at 400kHz offset) of -46dBc and -37.7dBc respectively","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122792428","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
High coupling transformer in CMOS technology 采用CMOS技术的高耦合变压器
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 Pub Date : 2006-06-11 DOI: 10.1109/RFIC.2006.1651132
H. Hsu, Ming-Ming Hsieh, Chien-Wen Tseng, Kuo-Hsun Huang
{"title":"High coupling transformer in CMOS technology","authors":"H. Hsu, Ming-Ming Hsieh, Chien-Wen Tseng, Kuo-Hsun Huang","doi":"10.1109/RFIC.2006.1651132","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651132","url":null,"abstract":"This study proposes a high coupling transformer using current silicon-based technology. Maintaining identical self inductance of proposed transformer, the different layout configuration is discussed in this work. Moreover, an equivalent circuit is proposed to investigate the device behavior especially for high frequency","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123719484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A unified modeling and design methodology for RFICs using parameterized sub-circuit cells 使用参数化子电路单元的rfic统一建模和设计方法
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 Pub Date : 2006-06-11 DOI: 10.1109/RFIC.2006.1651168
Dong-Hun Shin, C. Yue
{"title":"A unified modeling and design methodology for RFICs using parameterized sub-circuit cells","authors":"Dong-Hun Shin, C. Yue","doi":"10.1109/RFIC.2006.1651168","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651168","url":null,"abstract":"This paper presents, for the first time, a cell-based modeling and design platform for RFICs aiming to shorten design cycle time by eliminating iterations between schematic and post-layout simulations and to minimize the risk for costly mask re-spin. Based on a pre-characterized RF sub-circuit cell library, which contains not only active devices and passive components but also routing interconnects, this methodology systematically alleviates the common RF model inaccuracy due to layout discrepancies between actual circuits and device model test structures. By exploiting the modularity in RF circuits at the sub-circuit level, the proposed design platform achieves a balance between circuit design flexibility and device model accuracy compared to the conventional approach of using pre-characterizing single transistors. This paper describes the implementation of the parameterized sub-circuit cell layout and the macro modeling techniques for a 0.13-mum CMOS RF sub-circuit cell library. Measurement results from a characterization test chip for validating the macro circuit models are presented","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121698006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A single-chip 0.13 /spl mu/m CMOS UMTS W-CDMA multi-band transceiver 单片0.13 /spl mu/m CMOS UMTS W-CDMA多波段收发器
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 Pub Date : 2006-06-11 DOI: 10.1109/RFIC.2006.1651116
R. Koller, T. Ruhlicke, D. Pimingsdorfer, B. Adler
{"title":"A single-chip 0.13 /spl mu/m CMOS UMTS W-CDMA multi-band transceiver","authors":"R. Koller, T. Ruhlicke, D. Pimingsdorfer, B. Adler","doi":"10.1109/RFIC.2006.1651116","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651116","url":null,"abstract":"A single-chip, fully-integrated 3G UMTS/W-CDMA transceiver covering all operating bands specified by the current UMTS FDD standard has been implemented in a standard 0.13 mum CMOS process for use in FDD mobile applications. The design includes two fractional-N synthesizers with fully-integrated VCOs, on-chip tuning and PLLs as well as the zero-IF receiver and direct-upconversion transmitter paths. The chip is mounted in an extremely small lead-less package with just 5-by-5 mm outline dimensions and a maximum height of 0.8 mm and fully complies with ARIB W-CDMA and UMTS standards","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126350407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
High linearity performance of 0.13 /spl mu/m CMOS devices using field-plate technology 采用场极板技术的0.13 /spl μ m CMOS器件的高线性性能
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 Pub Date : 2006-06-11 DOI: 10.1109/RFIC.2006.1651194
Chien-Cheng Wei, H. Chiu, Wu-Shiung Feng
{"title":"High linearity performance of 0.13 /spl mu/m CMOS devices using field-plate technology","authors":"Chien-Cheng Wei, H. Chiu, Wu-Shiung Feng","doi":"10.1109/RFIC.2006.1651194","DOIUrl":"https://doi.org/10.1109/RFIC.2006.1651194","url":null,"abstract":"High linearity performance of 0.13 mum CMOS devices using field-plate technology is presented in this paper. The field-plate technology functions for reducing the electric field between gate and drain terminals, which provides a field-plate induced depletion region and decreases the leakage current to greatly improve the linearity and power performance of CMOS devices. The third-order inter-modulation product (IM3) of 0.13 mum NMOS devices with and without field-plate technology are -41.8 dBm and -32.4 dBm for input power is -10 dBm, respectively. The experimental results show that the field-plate architecture is more effective to exhibit high linearity and power for CMOS RFIC applications","PeriodicalId":194071,"journal":{"name":"IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132235007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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