N. Itoh, Y. Tsukamoto, Takeshi Shibagaki, K. Nii, H. Takata, H. Makino
{"title":"A 32/spl times/24-bit multiplier-accumulator with advanced rectangular styled Wallace-tree structure","authors":"N. Itoh, Y. Tsukamoto, Takeshi Shibagaki, K. Nii, H. Takata, H. Makino","doi":"10.1109/ISCAS.2005.1464527","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464527","url":null,"abstract":"We introduce the advanced rectangular styled Wallace-tree construction method. This method realizes a compact layout and high-speed operation of multiplier. A 32/spl times/24-bit multiplier-accumulator was constructed using this new method. 540 um/spl times/840 um area size and 300 MHz clock speed were achieved using 0.15 um CMOS logic process technology with flash memory.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125100674","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new multiply-by-two gain-stage with enhanced immunity to capacitor-mismatch","authors":"H. Zare-Hoseini, O. Shoaei, I. Kale","doi":"10.1109/ISCAS.2005.1464861","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464861","url":null,"abstract":"A new multiply-by-two gain-stage (MBT-GS)(/spl times/2) is presented in which the gain-sensitivity to the capacitors' mismatches is suppressed. Using one operational amplifier (op-amp) in three phases, a gain of two, which is not highly influenced by the mismatches between the capacitors, is achieved. An analytical study of the architecture is presented followed by some Monte-Carlo simulations using a generic 0.6 /spl mu/m CMOS technology in HSPICE. Simulations clearly show the reduction of the matching-requirements in the new architecture.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125873987","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On-line learning applied to power system transient stability prediction","authors":"X. Chu, Yutian Liu","doi":"10.1109/ISCAS.2005.1465484","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465484","url":null,"abstract":"A neural network-based system is proposed for power system transient stability prediction. A power system is a nonstationary environment, where operating conditions change from time to time. To make accurate predictions of the transient stability status of a power system, training examples are added continuously to reflect the most current operating condition. An on-line learning algorithm is employed to accommodate new training examples while avoiding negative interference. A real-world power system in China is used to demonstrate the effectiveness of the proposed transient stability prediction system. Simulation results show that the system performs well in different working modes and is able to make accurate predictions.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123549527","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yegui Xiao, Liying Ma, K. Khorasani, A. Ikuta, Li Xu
{"title":"A filtered-X RLS based narrowband active noise control system in the presence of frequency mismatch","authors":"Yegui Xiao, Liying Ma, K. Khorasani, A. Ikuta, Li Xu","doi":"10.1109/ISCAS.2005.1464574","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464574","url":null,"abstract":"Rotating machines, such as fans, engines, large-scale cutting machines etc., generate noise signals of a sinusoidal nature. Narrowband active noise control (ANC) systems are effective in suppressing these noise signals. However, when the reference timing signal sensor and the cosine wave generator contain errors, the frequencies of the reference sinusoids fed to each ANC channel are different from the primary noise signal frequencies. This difference is referred to as frequency mismatch (FM). We first introduce a fast filtered-X RLS (FXRLS) algorithm to replace the filtered-X LMS (FXLMS) algorithm in the conventional parallel form narrowband ANC system, and demonstrate its improved performance without FM. Second, through extensive simulations, it is revealed that this FXRLS-based ANC system may suffer from significant performance degradation in the presence of FM. Third, the FXRLS-based system is modified to mitigate the influence of the FM by incorporating second-order AR model based adaptive blocks that are updated by an LMS or RLS algorithm. Simulations are provided to demonstrate that the modified system is robust to the existence of FM and superior to a recently developed FXLMS-based ANC system in terms of capabilities of suppressing the undesirable FM.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123604217","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An LSI system with locked in temperature insensitive state achieved by using body bias technique","authors":"G. Ono, M. Miyazaki, Kazuki Watanabe, T. Kawahara","doi":"10.1109/ISCAS.2005.1464667","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464667","url":null,"abstract":"Forward-body-bias (FBB) technology can compensate performance fluctuation in LSIs for low-voltage-operation. However, because the FBB characteristics depend on the temperature, the FBB control effect is decreased at high temperatures. A temperature insensitive state (TIS) for supply voltage improves the LSI performance as a solution of the dependence of the FBB characteristics on temperature. When an LSI is operated in a TIS, the performance fluctuation is fixed in a low temperature condition. We propose a TIS locking circuit that achieves TIS operation and reduces performance fluctuation. The circuit achieves this by detecting the threshold voltage and generating a voltage proportional to temperature. Compensating TIS decreased performance fluctuation and power consumption of an LSI to one-third of those before TIS control was applied.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126619201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"70 MHz CMOS gm-C IF filter","authors":"M. Qureshi, P. Allen","doi":"10.1109/ISCAS.2005.1465993","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465993","url":null,"abstract":"The implementation of a high dynamic range on-chip 70 MHz gm-C filter for a UMTS (WCDMA) superheterodyne receiver is described. The filter is designed in National Semiconductor's 0.18 micron standard CMOS process. The Chebyshev approximation is used to implement a 6th order filter in active gm-C. Positive feedback is used to realize a large quality factor (Q). The filter provides blocker attenuation with dynamic range (DR) of 42 dB and with power consumption of 21.78 mW.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114957231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Efficient computation of dominators in multiple-output circuit graphs","authors":"R. Krenz","doi":"10.1109/ISCAS.2005.1465064","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465064","url":null,"abstract":"We present an efficient technique for computing dominators in multiple-output circuit graphs. Dominators provide information about the origin and the end of reconverging paths in a graph. This information is widely used in CAD applications such as satisfiability checking, equivalence checking, ATPG, technology mapping, decomposition of Boolean functions and power optimization. Experiments on a large set of benchmarks show a significant performance improvement of our new technique in comparison to the well-known algorithm, presented by T. Lengauer and R.E. Tarjan (1979), for computing dominators in flowgraphs. We demonstrate that, in contrast to previous techniques, our algorithm obtains performance improvements especially for large benchmarks.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115110280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of UWB pulses based on B-splines","authors":"Mitsuhiro Matsuo, M. Kamada, H. Habuchi","doi":"10.1109/ISCAS.2005.1465863","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465863","url":null,"abstract":"The paper discusses the construction of UWB pulses on the basis of B-splines under the following conditions: (i) the B-splines are time-limited piecewise polynomials; (ii) the pulses are rectangular when their order is one and they converge to band-limited functions at the limit that their order tends to infinity; (iii) an analog circuit and a fast digital filter exist for the generation of B-splines. A constrained minimization technique is proposed for designing pulses so as to comply with the FCC spectral mask and satisfy basic requirements for UWB pulses.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115187703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Pilot-aided DOA estimation for CDMA communication systems","authors":"Nanyan Y. Wang, P. Agathoklis, A. Antoniou","doi":"10.1109/ISCAS.2005.1464869","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464869","url":null,"abstract":"A pilot-aided direction-of-arrival estimation technique for code-division multiple access systems is proposed. The direction of arrival is estimated based on the computation of the phase shift between the reference signal and its phase-shifted version, which is obtained through subarray beamforming. Since the directions of arrival are estimated after interference rejection, the effect of cochannel interference on the estimation is significantly reduced. Further, since subspace estimation and eigendecomposition are not required, the proposed technique is computationally simpler than existing direction-of-arrival estimation techniques. Extensive simulations show that the proposed technique offers significantly improved estimation capacity, accuracy, and tracking capability relative to existing techniques.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115249935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Image compression with interpolation in wavelet-transform domain","authors":"Wen-min Lin, Chih-Ming Chen, Yung-Chang Chen","doi":"10.1109/ISCAS.2005.1465029","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465029","url":null,"abstract":"Wavelets are being used in a number of different applications such as image enlargement and image compression. In order to benefit both applications, we propose a method to estimate the high pass output from the low pass one. Using the predicted high pass output, we would be able to enlarge an image superior to other compared interpolation methods in many situations. Moreover, we utilize the predicted sub-band for a wavelet image coder. It is shown that by using this proposed method we can profit both image enlargement and its compression.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115344696","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}