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2005 IEEE International Symposium on Circuits and Systems最新文献

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A new 4.3 ppm//spl deg/C voltage reference using standard CMOS process with 1V supply voltage 新的4.3 ppm//spl度/C基准电压，采用标准CMOS工艺，电源电压为1V
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465569
Q. X. Zhang, L. Siek
{"title":"A new 4.3 ppm//spl deg/C voltage reference using standard CMOS process with 1V supply voltage","authors":"Q. X. Zhang, L. Siek","doi":"10.1109/ISCAS.2005.1465569","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465569","url":null,"abstract":"A new 1 V supply voltage reference, using a standard CMOS process, with threshold voltage close to the supply voltage is proposed. The threshold voltages of NMOS and PMOS are 0.81 V and -1.05 V respectively at a temperature of -25/spl deg/C. Simulation results show that the proposed design can achieve below 4.3 ppm//spl deg/C between -25/spl deg/C and 150/spl deg/C at supply voltage of 1 V; as the supply voltage increases to 2 V, the temperature coefficient only increases to 9.3 ppm//spl deg/C.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"139 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120871638","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A high-throughput DLMS adaptive algorithm 一种高吞吐量DLMS自适应算法
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465446
Ejaz Mahfuz, Chunyan Wang, M. Ahmad
{"title":"A high-throughput DLMS adaptive algorithm","authors":"Ejaz Mahfuz, Chunyan Wang, M. Ahmad","doi":"10.1109/ISCAS.2005.1465446","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465446","url":null,"abstract":"The high-throughput delayed LMS (DLMS) adaptive algorithm suffers from a slower convergence rate compared to the LMS algorithm. Different versions of the DLMS adaptive algorithm using a conversion scheme have been proposed to improve the convergence rate. This improved convergence was achieved at the expense of an increased computational complexity and a lower throughput rate than the original DLMS algorithm. We propose a new modified DLMS adaptive algorithm that, compared to the existing conversion-based DLMS algorithm, provides a higher throughput rate for a similar convergence rate. Alternatively, the proposed algorithm provides a faster convergence for the same throughput rate compared to the conversion-based DLMS algorithm. In both the cases, the computational complexity of the proposed algorithm is smaller than that of the conversion-based DLMS algorithm. The proposed algorithm uses the error signal from each stage of the adaptive FIR filter independently to update the value of the corresponding coefficient. Simulations illustrate the convergence performance of the new algorithm. The performance of its architecture is evaluated in terms of computational complexity, throughput, and latency. The proposed algorithm provides a better throughput rate and a computational complexity lower than that of the conversion-based DLMS algorithm.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":" 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120984531","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Design of an efficient memory-based DVB-T channel decoder 基于存储器的高效DVB-T信道解码器的设计
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465761
Yun-Nan Chang
{"title":"Design of an efficient memory-based DVB-T channel decoder","authors":"Yun-Nan Chang","doi":"10.1109/ISCAS.2005.1465761","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465761","url":null,"abstract":"A highly efficient implementation of a channel decoder for the terrestrial digital video broadcast (DVB-T) standard is presented. The DVB-T channel decoder is mainly composed of four major modules which all require significant amounts of intermediate data storage. The main contribution of the paper is to propose a suitable architectural solution for each individual module to achieve efficient realization of the data storage mostly by single-port memory blocks. Our implementation result shows that the core area of the entire DVB-T channel decoder IP (intellectual property) can be realized in less than 8 mm/sup 2/ in 0.35-/spl mu/m TSMC technology.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121272923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
The technique of pre-scaled integer transform 预缩放整数变换技术
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1464588
Cixun Zhang, J.-G. Lou, Lu Yu, Jie Dong, W. Cham
{"title":"The technique of pre-scaled integer transform","authors":"Cixun Zhang, J.-G. Lou, Lu Yu, Jie Dong, W. Cham","doi":"10.1109/ISCAS.2005.1464588","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464588","url":null,"abstract":"The integer cosine transform (ICT) is adopted by H.264/AVC for its bit-exact implementation and significant complexity reduction compared to the discrete cosine transform (DCT) with an impact in peak signal-to-noise ratio (PSNR) of less than 0.02dB. In this paper, a new technique, named pre-scaled integer transform (PIT), is proposed. With PIT, the implementation complexity is further reduced compared to conventional ICT, especially for low-end processors while all the merits of ICT are kept. Extensive experiments show that no obvious penalty in performance is observed but rather a slight gain in PSNR is obtained by using PIT when the integer transform matrix used meets certain requirements.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127306694","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
Multipurpose image watermarking in DCT domain using subsampling 基于子采样的DCT域多用途图像水印
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465611
Fan Gu, Zhe-ming Lu, Jeng-Shyang Pan
{"title":"Multipurpose image watermarking in DCT domain using subsampling","authors":"Fan Gu, Zhe-ming Lu, Jeng-Shyang Pan","doi":"10.1109/ISCAS.2005.1465611","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465611","url":null,"abstract":"In this paper, a DCT-based multipurpose image watermarking algorithm is proposed. Through adopting dither modulation in subimages gained by subsampling, two independent robust watermarks can be embedded in the original image. Experimental results demonstrate the effectiveness of the proposed algorithm.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127382336","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
New graph transformation schemes in graph-based memory allocation method for an indirect addressing DSP 基于图形的间接寻址DSP内存分配方法中的图形转换新方案
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465720
N. Sugino, T. Matsuura, A. Nishihara
{"title":"New graph transformation schemes in graph-based memory allocation method for an indirect addressing DSP","authors":"N. Sugino, T. Matsuura, A. Nishihara","doi":"10.1109/ISCAS.2005.1465720","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465720","url":null,"abstract":"For indirect addressing DSPs, a novel memory address allocation method based on graph representation is presented. The method translates a given memory access sequence into a graph notation, and transforms it into line-shaped graphs. At the transformation, a cost evaluation measure is newly introduced, so that efficient memory allocation is given. The proposed cost functions are applied to the existing memory allocation method, and memory allocation results derived for several examples show its effectiveness.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127434742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Neural network handoff in shadow-Rayleigh fading 阴影-瑞利衰落下的神经网络切换
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465793
R. Suleesathira, S. Kunarak
{"title":"Neural network handoff in shadow-Rayleigh fading","authors":"R. Suleesathira, S. Kunarak","doi":"10.1109/ISCAS.2005.1465793","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465793","url":null,"abstract":"A handoff algorithm in a cellular system under shadow-Rayleigh fading propagation is presented. The algorithm applies the timing advance for mobile positioning. The inputs of the proposed radial-basis function network consist of the mobile direction obtained by the MUSIC method on an array antenna, the received signal strengths (RSSs) of the mobile from the serving cell and from nearby cells and traffic intensities. Consequently, we obtain a significantly improved performance in comparison to the hysteresis rule. The evaluations are done in measurements of (1) handoff rate, blocking rate, dropping rate versus the traffic intensities and mean arrival times and (2) the difference between the mobile signal strength and the required minimum strength value before the system drop the calls versus the number of handoffs.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127470539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Frame size selection in video downsizing transcoding application 视频缩码转码应用中的帧大小选择
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1464733
H. Shu, Lap-Pui Chau
{"title":"Frame size selection in video downsizing transcoding application","authors":"H. Shu, Lap-Pui Chau","doi":"10.1109/ISCAS.2005.1464733","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464733","url":null,"abstract":"In order to transmit a pre-coded video stream through a bandwidth constrained network, a downsizing transcoding technique has been introduced because it can reach a very low bit rate without losing any motion information. With the proposal of arbitrary downsizing, a fine gradual reduction of bit rate and video quality becomes feasible. However, there is little research focusing on frame size selection for arbitrary downsizing transcoding. In this paper, we propose an efficient method to estimate the number of bits allocated to residue information in the re-quantization process. By estimating a lower bound of the bit rate of the corresponding frame size, a reliable decision can be made. Experimental results show that the proposed method can provide an accurate estimation.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"2016 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127481875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Construction of regular 3D point clouds using octree partitioning and resampling 使用八叉树分割和重采样构建规则的三维点云
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1464748
Jae-Young Sim, Sang-Uk Lee, Chang-Su Kim
{"title":"Construction of regular 3D point clouds using octree partitioning and resampling","authors":"Jae-Young Sim, Sang-Uk Lee, Chang-Su Kim","doi":"10.1109/ISCAS.2005.1464748","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464748","url":null,"abstract":"We propose a construction algorithm of regular 3D point clouds from irregular ones. An irregular point cloud is partitioned hierarchically using an octree, and the points in each octree node are projected onto a square face, called a base plane, of the cubic node. The geometry of the point cloud is then represented by the height fields on the base planes. The height fields are interpolated and then resampled uniformly on the base plane. Consequently, the original geometry is represented by the scalar height fields, each of which is defined at uniform grid points on a square region. Therefore, the resulting geometry can be easily processed by conventional 2D image processing techniques.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127493821","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Global exponential stability analysis of delayed cellular neural networks 延迟细胞神经网络的全局指数稳定性分析
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465673
S. Senan, S. Arik
{"title":"Global exponential stability analysis of delayed cellular neural networks","authors":"S. Senan, S. Arik","doi":"10.1109/ISCAS.2005.1465673","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465673","url":null,"abstract":"This paper presents new sufficient conditions for the global exponential stability of the equilibrium point for delayed cellular neural networks (DCNN). It is shown that the use of a more general type of Lyapunov-Krasovskii functional enables us to derive new results for exponential stability of the equilibrium point for DCNN. The results are also compared with the most recent results derived in the literature.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124885937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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