发布求助
文献互助 智能选刊 最新文献

2005 IEEE International Symposium on Circuits and Systems最新文献

筛选
英文 中文
The separability, reducibility and controllability of RLCM networks over F(z) F(z)上RLCM网络的可分性、可约性和可控性
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1464569
K. Lu, Xiao-Yu Feng, Guo-Zhang Gao
{"title":"The separability, reducibility and controllability of RLCM networks over F(z)","authors":"K. Lu, Xiao-Yu Feng, Guo-Zhang Gao","doi":"10.1109/ISCAS.2005.1464569","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464569","url":null,"abstract":"The separability of a resistor-inductor-capacitor-mutual inductance (RLCM) network is defined. On the basis of RLC networks, some separability, reducibility and controllability (observability) criteria of RLCM networks over F(z) are derived.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115441376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Low-leakage repeaters for NoC interconnects 用于NoC互连的低泄漏中继器
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1464659
A. Morgenshtein, I. Cidon, R. Ginosar, A. Kolodny
{"title":"Low-leakage repeaters for NoC interconnects","authors":"A. Morgenshtein, I. Cidon, R. Ginosar, A. Kolodny","doi":"10.1109/ISCAS.2005.1464659","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464659","url":null,"abstract":"Several low-leakage repeater circuits for network-on-chip (NoC) interconnects are presented and analyzed for various utilization rates. The recently proposed staggered-Vt (SVT) repeater is compared with the novel dual-Vt domino (DTD) repeaters and sleep repeaters (SR). These circuits are compared with standard low-Vt (LVT) repeaters in a 32-bit link. Up to 70% and 61% power reduction was obtained in SVT and DTD repeaters, respectively. DTD repeaters are the most area-efficient ones, showing 40% reduction in total area of repeaters. Sleep repeaters are most area-consuming and less effective in high and moderate utilization rates, but comparable to SVT in terms of power for utilization rates below 2%, showing 72% power reduction.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115497619","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Nanoliter array advances: miniaturized, high-speed PCR sensing & control 纳米阵列的进步:小型化，高速PCR检测和控制
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465238
I. Young, V. Iordanov, Heidi R. C. Dietrich, A. Bossche
{"title":"Nanoliter array advances: miniaturized, high-speed PCR sensing & control","authors":"I. Young, V. Iordanov, Heidi R. C. Dietrich, A. Bossche","doi":"10.1109/ISCAS.2005.1465238","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465238","url":null,"abstract":"We have previously reported on our laboratory-on-a-chip nanoarray system based on nanoliter-capacity wells etched in silicon (Young, I.T. et al., J. Microscopy, vol.212, no.3, p.254-63, 2003; Dietrich, H.R.C. et al., Analytical Chemistry, vol.76, no.14, p.4112-17, 2004). We now describe how temperature sensing and control embedded in the floor of the nano-wells make it possible for us to cycle each well independently through the temperatures 92/spl deg/C, 55/spl deg/C, and 75/spl deg/C. This individual temperature cycling on nanoliter wells means that the nano-array architecture is suitable for PCR applications and that the total time needed for 30 cycles of PCR amplification could be less than five minutes. Further, we describe how, by embedding photodiodes in the floor of the wells, we can track the fluorescence associated with the melting and annealing of DNA when labeled with a suitable nucleic acid stain. Measurements performed with the fluorophores Rhodamine B and SYBR Green I have demonstrated our ability to control the temperature, measure the fluorescence, and monitor the denaturation and renaturation of DNA.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"209 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115645308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A method of 3D face recognition based on principal component analysis algorithm 基于主成分分析算法的三维人脸识别方法
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465311
Xue Yuan, Jianming Lu, T. Yahagi
{"title":"A method of 3D face recognition based on principal component analysis algorithm","authors":"Xue Yuan, Jianming Lu, T. Yahagi","doi":"10.1109/ISCAS.2005.1465311","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465311","url":null,"abstract":"We present a method of face recognition using 3D images. We first compensate the poses of 3D original facial images using geometrical measurement and extract 2D texture data and the 3D shape data from 3D facial images for recognition. Based on a principal component analysis (PCA) algorithm, all the 2D texture images and the 3D shape images are normalized to 32/spl times/32 pixels. In the second step, we propose a method for face recognition based on fuzzy clustering and parallel neural networks. Experimental results for 70 persons with different poses demonstrate the efficiency of our algorithm.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115664904","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 23
Low-power current mode logic for improved DPA-resistance in embedded systems 用于提高嵌入式系统dpa电阻的低功耗电流模式逻辑
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1464774
Z. Deniz, Y. Leblebici
{"title":"Low-power current mode logic for improved DPA-resistance in embedded systems","authors":"Z. Deniz, Y. Leblebici","doi":"10.1109/ISCAS.2005.1464774","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464774","url":null,"abstract":"In this work, MOS current mode logic (MCML) is analyzed for low power, low noise, mixed signal applications demanding high security such as embedded cryptographic processors and smart cards. We emphasize the possible extension of MCML gate usage for low speed applications requiring high noise immunity and having strict specifications regarding the input pattern-dependence with respect to current drawn from the power supply for better data security. A set of logic gates were realized using 0.18 /spl mu/m CMOS technology, and their performance has been compared to static CMOS gates, showing an improvement of one to two orders of magnitude.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"58-60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123127310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 54
Diversity gain's influence on MIMO's detection 分集增益对MIMO检测的影响
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1464937
Hui Zhao, K. Zheng, Wenbo Wang
{"title":"Diversity gain's influence on MIMO's detection","authors":"Hui Zhao, K. Zheng, Wenbo Wang","doi":"10.1109/ISCAS.2005.1464937","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464937","url":null,"abstract":"Multiple-input and multiple-output (MIMO) is a promising technology that realizes the enormous capacity in future wireless communication systems. For multi-stream detection there are many algorithms. In this paper, we investigate the diversity gain's influence on detection performance of these algorithms. Through three groups simulation with different diversity, we verify that the diversity changes the performance gap between different detection algorithms. The simple detection may be adopted with the same performance as the complicated detection in some practical systems.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116781347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Realization of card-centric framework: a card-centric computer [smart cards] 以卡为中心框架的实现:以卡为中心的计算机【智能卡】
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465756
Chi-Leung San, O. Choy, P. Chan, C. Chan, K. Pun
{"title":"Realization of card-centric framework: a card-centric computer [smart cards]","authors":"Chi-Leung San, O. Choy, P. Chan, C. Chan, K. Pun","doi":"10.1109/ISCAS.2005.1465756","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465756","url":null,"abstract":"A card-centric framework is proposed to expand smart cards' potential and perhaps help smart cards to survive in the ever-changing world of consumer electronics. In the card-centric framework, smart cards play an active role and control their own I/O devices. The card-centric computer is an implementation of the card-centric framework and can work as a fully functional computer. It demonstrates the ability of smart cards to have control over the mouse, keyboard and VGA output through a dummy console. It proves the feasibility of the card-centric framework and offers a glimpse of the future of smart card technology.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116885409","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Blind extraction of a dominant source from mixtures of many sources using ICA and time-frequency masking 利用独立分量分析和时频掩蔽从多源混合中盲提取优势源
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465977
H. Sawada, S. Araki, R. Mukai, S. Makino
{"title":"Blind extraction of a dominant source from mixtures of many sources using ICA and time-frequency masking","authors":"H. Sawada, S. Araki, R. Mukai, S. Makino","doi":"10.1109/ISCAS.2005.1465977","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465977","url":null,"abstract":"The paper presents a method for enhancing a target source of interest and suppressing other interference sources. The target source is assumed to be close to sensors, to have dominant power at these sensors, and to have non-Gaussianity. The enhancement is performed blindly, i.e., without knowing the total number of sources or information about each source, such as position and active time. We consider a general case where the number of sources is larger than the number of sensors. We employ a two-stage process where independent component analysis (ICA) is first employed in each frequency bin and time-frequency masking is then used to improve the performance further. We propose a new sophisticated method for selecting the target source frequency components, and also a new criterion for specifying time-frequency masks. Experimental results for simulated cocktail party situations in a room (reverberation time was 130 ms) are presented to show the effectiveness and characteristics of the proposed method.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117062752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Estimating likelihood of correctness for error candidates to assist debugging faulty HDL designs 估计候选错误的正确性可能性，以帮助调试错误的HDL设计
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465927
T. Jiang, C. Liu, Jing-Yang Jou
{"title":"Estimating likelihood of correctness for error candidates to assist debugging faulty HDL designs","authors":"T. Jiang, C. Liu, Jing-Yang Jou","doi":"10.1109/ISCAS.2005.1465927","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465927","url":null,"abstract":"Debugging priority is a helpful technique to assist debugging faulty HDL designs. However, the debugging priority obtained by confidence score sorting is not good enough due to the inaccuracy in estimating the likelihood of correctness for error candidates. Therefore, we developed the refined confidence score for deriving better debugging priority.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117351617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
A unified procedure for locating the stabilizable regions of two-dimensional switched systems 二维切换系统可稳定区域定位的统一程序
2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI: 10.1109/ISCAS.2005.1465214
G. Zhai, Bo Hu, J. Imae, Tomoaki Kobayashi
{"title":"A unified procedure for locating the stabilizable regions of two-dimensional switched systems","authors":"G. Zhai, Bo Hu, J. Imae, Tomoaki Kobayashi","doi":"10.1109/ISCAS.2005.1465214","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465214","url":null,"abstract":"We introduce a procedure for determining the stabilizable regions of two-dimensional switched systems consisting of two linear time-invariant subsystems. Our method does not need to consider the detailed classification and geometric properties of the subsystems involved, and concentrates on presenting a unified approach for locating the stabilizable regions of the switched systems under study. Several numerical examples are presented to demonstrate the applicability of the procedure.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":" 11","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120829761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信