Low-power current mode logic for improved DPA-resistance in embedded systems

Abstract

In this work, MOS current mode logic (MCML) is analyzed for low power, low noise, mixed signal applications demanding high security such as embedded cryptographic processors and smart cards. We emphasize the possible extension of MCML gate usage for low speed applications requiring high noise immunity and having strict specifications regarding the input pattern-dependence with respect to current drawn from the power supply for better data security. A set of logic gates were realized using 0.18 /spl mu/m CMOS technology, and their performance has been compared to static CMOS gates, showing an improvement of one to two orders of magnitude.