估计候选错误的正确性可能性，以帮助调试错误的HDL设计

2005 IEEE International Symposium on Circuits and Systems Pub Date : 2005-05-23 DOI:10.1109/ISCAS.2005.1465927

T. Jiang, C. Liu, Jing-Yang Jou

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引用次数: 12

摘要

调试优先级是一种有助于调试错误HDL设计的技术。然而，由于估计候选错误的正确性可能性不准确，通过置信度评分排序获得的调试优先级不够好。因此，我们开发了精细的置信度评分，以获得更好的调试优先级。

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Estimating likelihood of correctness for error candidates to assist debugging faulty HDL designs

Debugging priority is a helpful technique to assist debugging faulty HDL designs. However, the debugging priority obtained by confidence score sorting is not good enough due to the inaccuracy in estimating the likelihood of correctness for error candidates. Therefore, we developed the refined confidence score for deriving better debugging priority.

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2005 IEEE International Symposium on Circuits and Systems

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