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A monolithic 12-bit multiplying DAC for NTSC and HDTV applications 用于NTSC和HDTV应用的单片12位乘法DAC
Proceedings of the Bipolar Circuits and Technology Meeting Pub Date : 1989-09-18 DOI: 10.1109/BIPOL.1989.69459
C. Martínez, S. Simpkins, S. S. Taylor
{"title":"A monolithic 12-bit multiplying DAC for NTSC and HDTV applications","authors":"C. Martínez, S. Simpkins, S. S. Taylor","doi":"10.1109/BIPOL.1989.69459","DOIUrl":"https://doi.org/10.1109/BIPOL.1989.69459","url":null,"abstract":"A voltage output digital-to-analog (DAC) that achieves precise dynamic performance with clock rates greater than 70 MHz is described. It was fabricated using an oxide-isolated bipolar process with an F/sub t/ of 8 GHz. The minimum finished transistor emitter size is 1.6 mu m by 3.9 mu m. Additional features include vanadium Schottky diodes, laser-trimmed thin-film NiCr resistors, and two-level gold metallization on a 4- mu m metal pitch. The die size is 140 mil*160 mil. The DAC operates from a -5.2-V supply and incorporates an analog multiplying function for output modulation at video speeds. The IC is capable of clock frequencies greater than 250 MHz. The circuit architecture, control amplifier, and voltage generator are discussed. Performance results are reported, showing that the DAC can be used for a wide range of applications in addition to broadcast TV. Low glitching, low noise, and high DC accuracy make it useful for arbitrary waveform generation and direct digital synthesis at data rates up to 250 MHz.<<ETX>>","PeriodicalId":189201,"journal":{"name":"Proceedings of the Bipolar Circuits and Technology Meeting","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117236609","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Modeling issues for advanced bipolar device/circuit simulation 高级双极器件/电路仿真的建模问题
Proceedings of the Bipolar Circuits and Technology Meeting Pub Date : 1989-09-18 DOI: 10.1109/BIPOL.1989.69499
J. Fossum
{"title":"Modeling issues for advanced bipolar device/circuit simulation","authors":"J. Fossum","doi":"10.1109/BIPOL.1989.69499","DOIUrl":"https://doi.org/10.1109/BIPOL.1989.69499","url":null,"abstract":"Physical mechanisms that govern the operation of advanced bipolar transistors (BJTs), but are not represented well in compact circuit (e.g. SPICE) models, are overviewed. Conventional circuit models for BJTs are reviewed to reveal their deficiencies. Then it is shown how the important mechanisms in the advanced BJT can be properly accounted for by seminumerical physical models, based on multilevel Newton-like iterative methods of solving carrier transport, written into the circuit-simulator source code.<<ETX>>","PeriodicalId":189201,"journal":{"name":"Proceedings of the Bipolar Circuits and Technology Meeting","volume":"1 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125605780","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A wideband low-offset current-feedback op amp design 一种宽带低偏置电流反馈运放设计
Proceedings of the Bipolar Circuits and Technology Meeting Pub Date : 1989-09-18 DOI: 10.1109/BIPOL.1989.69472
I.A. Koullias
{"title":"A wideband low-offset current-feedback op amp design","authors":"I.A. Koullias","doi":"10.1109/BIPOL.1989.69472","DOIUrl":"https://doi.org/10.1109/BIPOL.1989.69472","url":null,"abstract":"A current-feedback op amp design technique that reduces the offset voltage without degrading the bandwidth and the input dynamic range is described. The use of the basic push-pull buffer as the op amp input stage results in low inverting-input impedance, which improves the closed-loop gain-bandwidth product. The offset voltage is reduced by making the bias currents of the input buffer vary as a function of the mismatch between the n-p-n and p-n-p V/sub be/'s. The dynamic input range and open-loop gain are increased by the use of a modified Wilson current mirror.<<ETX>>","PeriodicalId":189201,"journal":{"name":"Proceedings of the Bipolar Circuits and Technology Meeting","volume":"53 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134404817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Transit time of high-speed bipolar transistors in dependence on operating point, technological parameters, and temperature 高速双极晶体管的传输时间与工作点、工艺参数和温度的关系
Proceedings of the Bipolar Circuits and Technology Meeting Pub Date : 1989-09-18 DOI: 10.1109/BIPOL.1989.69502
M. Schroter, H. Rein
{"title":"Transit time of high-speed bipolar transistors in dependence on operating point, technological parameters, and temperature","authors":"M. Schroter, H. Rein","doi":"10.1109/BIPOL.1989.69502","DOIUrl":"https://doi.org/10.1109/BIPOL.1989.69502","url":null,"abstract":"The dependence of the transition time, tau /sub f/, of bipolar transistors on operating point, technological parameters (like thickness and doping concentration of the epitaxial collector) and temperature is investigated. A previously proposed analytical model for tau /sub f/ is extended to take temperature dependence into account. The critical collector current density, J/sub CK/, which defines the boundary to the high-current region, is an important quantity in the model. The physical background of the formulas for tau /sub f/ and J/sub ck/ are described, and their applicability within a wide range of parameters is demonstrated. The necessity for close-tolerance, thin, highly doped epitaxial collectors for future very-high-speed ICs is shown.<<ETX>>","PeriodicalId":189201,"journal":{"name":"Proceedings of the Bipolar Circuits and Technology Meeting","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130764124","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Technology and physics of polysilicon emitters 多晶硅发射体的技术与物理
Proceedings of the Bipolar Circuits and Technology Meeting Pub Date : 1989-09-18 DOI: 10.1109/BIPOL.1989.69463
H. Schaber, T. Meister
{"title":"Technology and physics of polysilicon emitters","authors":"H. Schaber, T. Meister","doi":"10.1109/BIPOL.1989.69463","DOIUrl":"https://doi.org/10.1109/BIPOL.1989.69463","url":null,"abstract":"Basic models proposed to explain the polysilicon emitter effect are reviewed, and the present status of polysilicon emitter modeling is summarized. The present state of the technology is described, and its advantages are discussed. Optimization of forward transit time and speed limitations of polysilicon emitter devices are examined.<<ETX>>","PeriodicalId":189201,"journal":{"name":"Proceedings of the Bipolar Circuits and Technology Meeting","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124519357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Masterslice II: a quick turnaround prototyping and production tool for gigahertz ICs Masterslice II:用于千兆赫集成电路的快速周转原型和生产工具
Proceedings of the Bipolar Circuits and Technology Meeting Pub Date : 1989-09-18 DOI: 10.1109/BIPOL.1989.69453
G. Flower, B. Lai, D. Lee, D. Sears, T. Stockwell
{"title":"Masterslice II: a quick turnaround prototyping and production tool for gigahertz ICs","authors":"G. Flower, B. Lai, D. Lee, D. Sears, T. Stockwell","doi":"10.1109/BIPOL.1989.69453","DOIUrl":"https://doi.org/10.1109/BIPOL.1989.69453","url":null,"abstract":"A description is given of Masterslice II, a highly versatile bipolar array suitable for quick turnaround prototyping of high-speed digital or analog circuits. The array has been designed for 3-GHz clock rates with minimum power dissipation using three-level series-gated ECL structures. This chip and its associated package feature ECL input levels and either ECL, EECL, BLL or TTL output levels. Provisions has been made to realize very low supply and ground inductances and on-chip terminations. Four pads are dedicated to voltage codes which identify the circuit for the test system.<<ETX>>","PeriodicalId":189201,"journal":{"name":"Proceedings of the Bipolar Circuits and Technology Meeting","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130048296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Single polysilicon layer advanced super high-speed BiCMOS technology 单多晶硅层先进的超高速BiCMOS技术
Proceedings of the Bipolar Circuits and Technology Meeting Pub Date : 1989-09-18 DOI: 10.1109/BIPOL.1989.69487
J. de Jong, R. Lane, B. van Schravendijk, G. Conner
{"title":"Single polysilicon layer advanced super high-speed BiCMOS technology","authors":"J. de Jong, R. Lane, B. van Schravendijk, G. Conner","doi":"10.1109/BIPOL.1989.69487","DOIUrl":"https://doi.org/10.1109/BIPOL.1989.69487","url":null,"abstract":"A single-polysilicon-layer advanced super-high-speed (HS4+) BiCMOS technology which offers 1- mu m NMOS and PMOS devices, 13-GHz bipolar npn transistors, lateral pnps, Schottky diodes, polysilicon resistors, lateral fuses, and three layers of Al/Cu interconnect is presented. The key processing steps and the resulting device characteristics are examined with an emphasis on the manufacturability of this technology. The bipolar transistor and CMOS device reliability is discussed.<<ETX>>","PeriodicalId":189201,"journal":{"name":"Proceedings of the Bipolar Circuits and Technology Meeting","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129220221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 33
A localized collector implant to improve uniformity of polysilicon bipolar transistors 一种改善多晶硅双极晶体管均匀性的局部集电极植入物
Proceedings of the Bipolar Circuits and Technology Meeting Pub Date : 1989-09-18 DOI: 10.1109/BIPOL.1989.69482
P. van Wijnen, J. de Jong, R. Lane, B. van Schravendijk
{"title":"A localized collector implant to improve uniformity of polysilicon bipolar transistors","authors":"P. van Wijnen, J. de Jong, R. Lane, B. van Schravendijk","doi":"10.1109/BIPOL.1989.69482","DOIUrl":"https://doi.org/10.1109/BIPOL.1989.69482","url":null,"abstract":"It is shown that a localized collectivity implant can be used to improve the device performance as well as to increase the uniformity of device characteristics over the wafer of single polysilicon bipolar transistors. These advantages, which do not require additional masking steps, are important for both bipolar and BiCMOS technologies. Application of the localized collector implant in BiCMOS processes has the additional benefit that the NPN and MOS transistors can be optimized fairly independently. Some of the negative effects of the localized collectivity implant approach are examined.<<ETX>>","PeriodicalId":189201,"journal":{"name":"Proceedings of the Bipolar Circuits and Technology Meeting","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125577647","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Poly Si-Si interfacial oxide ball-up mechanism and its control for 0.8 mu m BiCMOS VLSIs 0.8 μ m BiCMOS vlsi的聚硅界面氧化物起球机理及其控制
Proceedings of the Bipolar Circuits and Technology Meeting Pub Date : 1989-09-18 DOI: 10.1109/BIPOL.1989.69468
T. Maeda, M. Higashizono, H. Momose, J. Matsunaga
{"title":"Poly Si-Si interfacial oxide ball-up mechanism and its control for 0.8 mu m BiCMOS VLSIs","authors":"T. Maeda, M. Higashizono, H. Momose, J. Matsunaga","doi":"10.1109/BIPOL.1989.69468","DOIUrl":"https://doi.org/10.1109/BIPOL.1989.69468","url":null,"abstract":"Three samples with different thicknesses of polysilicon-silicon interfacial oxide were prepared. The influence of the interfacial oxide on the electrical characteristics of 0.8- mu m BiCMOS VLSIs was studied. From the results, the maximum interfacial oxide thickness allowed for BiCMOS LSIs was determined. To control the interfacial oxide thickness, the ball-up mechanism was studied using HRXTEM combined with energy-dispersive X-ray spectroscopy measurements. The optimum heat treatment after emitter deposition to realize 0.5- mu m BiCMOS VLSI was also determined.<<ETX>>","PeriodicalId":189201,"journal":{"name":"Proceedings of the Bipolar Circuits and Technology Meeting","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116265859","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Polysilicon emitter technology 多晶硅发射极技术
Proceedings of the Bipolar Circuits and Technology Meeting Pub Date : 1989-09-18 DOI: 10.1109/BIPOL.1989.69466
P. Ashburn
{"title":"Polysilicon emitter technology","authors":"P. Ashburn","doi":"10.1109/BIPOL.1989.69466","DOIUrl":"https://doi.org/10.1109/BIPOL.1989.69466","url":null,"abstract":"The current status of polysilicon emitter technology is reviewed. The advantages of polysilicon emitters in high speed VLSI processes, in particular their high gains and scalability, are highlighted. The physics and metallurgy of the polysilicon/silicon interface is described in detail, and a direct comparison is made with electrical results. It is demonstrated that the polysilicon can be epitaxially regrown to produce an extended single-crystal emitter.<<ETX>>","PeriodicalId":189201,"journal":{"name":"Proceedings of the Bipolar Circuits and Technology Meeting","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116556137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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