{"title":"Hybrid focal plane arrays for infrared imaging devices","authors":"B. Munier, J. Reboul, J. Portmann","doi":"10.1109/IEDM.1980.189830","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189830","url":null,"abstract":"For high-performance thermal imaging systems in the 8-12 micron atmospheric window, hybrid two-dimensional detector arrays are the most promising of the presently developed techniques. These arrays use infrared photovoltaic detectors coupled to a silicon readout circuit. This paper gives some new experimental results obtained with arrays of Pb0.80Sn0.20Te detectors (10.6µm cutoff wavelength) coupled to a silicon CCD. For electrical coupling the direct injection mode is used, in which the photocurrent from each detector is injected into the CCD through an input diffusion. The signal efficiency is measured and the noise sources of the CCD readout are determined : detector noise, coupling noise and transfer noise in the CCD channel. The performances of this readout and its main limitations are analyzed. Experimental results are also given for a hybrid mosaic of 10 × 10 Pb0.80Sn0.20Te infrared detectors on a silicon CCD readout circuit. For this small staring array, batch technology is used to obtain an \"island\" structure that is compatible with the mismatch of the thermal-expansion coefficients of lead salt and silicon. The effects of threshold voltage dispersion and of the transconductance figure of the CCD are discussed in relation to the characteristics of the detectors. Signal and noise homogeneities measured on the array are also discussed.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133783524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Hollis, N. Dandekar, L. Eastman, M. Shur, D. Woodard, R. Stall, C. Wood
{"title":"Transverse magnetoresistance in GaAs two terminal submicron devices: A characterization of electron transport in the near ballistic regime","authors":"M. Hollis, N. Dandekar, L. Eastman, M. Shur, D. Woodard, R. Stall, C. Wood","doi":"10.1109/IEDM.1980.189910","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189910","url":null,"abstract":"Ballistic electron motion at high velocity in thin layers of GaAs has important implications for high speed, high frequency devices. This mode of electron transport is characterized by mean free path lengths of up to 0.2 microns, over which the electrons are accelerated to velocities near 5 × 107cm/sec. We report the results of experimental and theoretical study of ballistic and near ballistic electron transport in the [100] direction in submicron GaAs layers grown by MBE. Results obtained from I-V measurements and magnetoresistance studies are interpreted in conjunction with the predictions of theoretical models to show that high values of drift velocity and large mean free path lengths are reached in short GaAs structures.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130601942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Velocity overshoot investigations in sub-micron GaAs devices by photoconduction experiments","authors":"S. Laval, C. Bru, C. Arnodo, R. Castagné","doi":"10.1109/IEDM.1980.189911","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189911","url":null,"abstract":"Direct evidence for electron velocity overshoot is obtained in Ga As sub-micron devices at room temperature. Photoconduction current variations as a function of electric field are compared for various device lengths and several incident light wavelengths.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"182 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133215712","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"InP millimeter wave Schottky barrier mixer diodes for low local oscillator power requirements","authors":"A. Christou, W. Anderson, M. L. Bark","doi":"10.1109/IEDM.1980.189863","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189863","url":null,"abstract":"A number of system applications at millimeter wavelengths have low local oscillator (LO) power requirements in addition to good noise performance. For instance, the replacement of Klystrons by a combination of solid state sources plus frequency multipliers at millimeter wavelengths has a strict LO power requirement. The barrier height φBis the important diode parameter in that it determines the local oscillator power required to bias the Schottky diode into its non-linear region. Schottky barriers to InP exhibit a low barrier due to the fact that the Fermi level is not pinned in the center of the energy gap. However, the development of reliable Schottky barriers to InP has been hampered by the large leakage current Schottky barriers to InP have exhibited. In the present paper, we report on a low barrier height, low leakage current Schottky barrier to InP. The InP Schottky barrier diodes fabricated have exhibited low noise figure at 36 and 94 GHz and require exceptionally low local oscillator power. The metallization scheme consisted of TiW sputtered at 200 W rf power. These diodes were processed with a 5 µm diameter active area on n-n+InP layers. At 36 GHz a noise figure of 6.5-7.0 dB resulted at LO power of .5 mW. At 94 GHz the noise figure of 8.0 dB required a LO power of only 0.75 mW.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116672332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Recent developments in thermophotovoltaic conversion","authors":"R. Swanson","doi":"10.1109/IEDM.1980.189789","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189789","url":null,"abstract":"Recent developments in silicon photovoltaic cells for use in a thermophotovoltaic energy converter have yielded conversion efficiencies of 29 percent with a 2300 K blackbody source. The structure and fabrication of these cells will be presented.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123667949","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A high power millimeter wave TWT amplifier","authors":"B. James, D. Schenk","doi":"10.1109/IEDM.1980.189781","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189781","url":null,"abstract":"A coupled cavity traveling wave tube operating at 35 gigahertz has been tested to an output power of 30 kilowatts peak and 9 kilowatts average. This high power millimeter wave amplifier is designed specifically for a coherent millimeter wave radar which is being designed and constructed by Massachusetts Institute of Technology, Lincoln Laboratory, under the sponsorship of the US Army Ballistic Missile Defense Advanced Technology Center. The amplifier was operated at beam voltage of 46.5 kilovolts with a beam current of 4.0 amperes. The tube requirements were 30 kilowatts peak, 3 kilowatts average over 1000 megahertz, 1 dB bandwidth, at a center frequency of 35 gigahertz with 50 dB saturated gain. These requirements were achieved during the development program with 17 percent interaction efficiency. The paper will describe the design concepts used in the development of this milimeter wave TWT amplifier. Design of the electron beam system, which is considered the highest power density electron beam generated to date, and the unique coupled cavity circuit design will be discussed in some detail. Test data for both the beam system and r.f. circuit will be presented. The r.f. performance characteristics of the tube will also be discussed and measured data presented.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123812204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fabrication and performance of InP MISFET","authors":"T. Kawakami, M. Okamura","doi":"10.1109/IEDM.1980.189862","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189862","url":null,"abstract":"N-channel normally-off InP MISFETs for high-gain and high-speed application have been developed, using the following fabrication techniques: (1)Sulphur diffusion process into p- and semi-insulating InP wafers for low resistive source and drain of the n-channel FET. (2)Al2O3CVD method onto the InP substrate. (3)n-channel formation on the semi-insulating InP substrate surface. (4)A pseudo self-alignment technique for eliminating gate-drain and gate-source parasitic capacitances. Conductance and drift properties have been studied together with MIS diode capacitance measurement and AES analysis.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"2010 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121788129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new dynamic RAM cell for VLSI memories","authors":"K. Terada, M. Takada, S. Kurosawa, S. Suzuki","doi":"10.1109/IEDM.1980.189900","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189900","url":null,"abstract":"A high density dynamic memory cell using DMOS tecnnology (DMOS cell) is proposed. A DMOS cell consists of an n-channel DMOSFET as a read gate and a p-channel MOSFET as a write gate with extensive node sharing, Since the two nDMOSFET threshold states are nondestructively detected, the readout signal voltage is almost invariant to scaling. The cell area, saved by using two polysilicon layers and triple self-aligned structure, is 50-60 % of the conventional one-transistor memory cell area. The DMOS cell was successfully fabricated, and the 1.2 V threshold shift and the 7 µA current difference per 1 µ channel width were obtained for 400 Å gate oxide test cell. The complete memory operation was confirmed with a 2×2 test cell array.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124959248","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Hijiya, T. Ito, T. Nakamura, N. Toyokura, H. Ishikawa
{"title":"Electrically alterable read-only memory cell with graded energy band-gap insulator","authors":"S. Hijiya, T. Ito, T. Nakamura, N. Toyokura, H. Ishikawa","doi":"10.1109/IEDM.1980.189902","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189902","url":null,"abstract":"Low voltage alterability and excellent memory retention have been obtained with a novel EAROM cell that has a graded energy band-gap film as the first insulator of a Floating-Gate type memory. The graded energy band-gap insulator can enhance charge injection without deteriorating memory retention, because the energy band-gap is narrowed only at the silicon substrate interface. A graded energy band-gap insulator has been realized by thermally oxidizing the surface of a very thin silicon nitride film grown by direct thermal nitridation of a silicon substrate. A fabricated EAROM cell has shown that it can be programmed by a single positive supply of less than 12 V and it has excellent memory retention.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130223439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 50 ns/15 V alterable n-channel nonvolatile memory device","authors":"M. Horiuchi, H. Katto","doi":"10.1109/IEDM.1980.189903","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189903","url":null,"abstract":"A new structure for a Floating Si-gate Channel Corner Avalanche Transition nonvolatile memory device (FCAT-II) is described. The new structure uses a modification of the previously reported FCAT (FCAT-I). The key improvement is that the floating gate couples better with the control gate. This device can oprate in both write and erase modes under high speed ( ≥ 50 ns( and low voltage ( ≤ 15 V) condition. Another useful feature is the saturation of the high level thresold voltage independent of write pulse widhs greater than 50 ns.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"9 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128888693","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}