2023 IEEE International Symposium on Circuits and Systems (ISCAS)最新文献_第7页

Neuromorphic Recurrent Spiking Neural Networks for EMG Gesture Classification and Low Power Implementation on Loihi 神经形态递归尖峰神经网络在肌电信号手势分类和Loihi上的低功耗实现

2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181510

Ahmed Shaban, S. S. Bezugam, M. Suri

引用次数: 0

Edge FPGA-based Onsite Neural Network Training 基于边缘fpga的现场神经网络训练

2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181582

Ruiqi Chen, Haoyang Zhang, Yu Li, Runzhou Zhang, Guoyu Li, Jun Yu, Kun Wang

引用次数: 0

Time-based Memristor Crossbar Array Programming for Stochastic Computing Parallel Sequence Generation 随机计算并行序列生成中基于时间的忆阻交叉棒阵列规划

2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181967

Nikos Temenos, V. Ntinas, P. Sotiriadis, G. Sirakoulis

{"title":"Time-based Memristor Crossbar Array Programming for Stochastic Computing Parallel Sequence Generation","authors":"Nikos Temenos, V. Ntinas, P. Sotiriadis, G. Sirakoulis","doi":"10.1109/ISCAS46773.2023.10181967","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181967","url":null,"abstract":"The so far dominant Von Neumann architecture is being challenged by the energy demanding communication bottle-neck between processing and memory units. To address this issue, in-memory computing is employed for their co-location, with memristive crossbar arrays playing an important role towards this goal. Motivated by the above, this work introduces a timing-based programming of a memristor crossbar array for sequence generation in Stochastic Computing (SC). Its operation principle is based on the stochastic nature of the memristor devices forming the crossbar array, where their programming is regulated by the switching probability that follows the Poisson distribution, controlled by pulse amplitude and duration. The timing-based programming of the proposed crossbar array increases the discretization levels of the output probability values, thereby offering more accurate control when compared to programming schemes that consider only the pulse amplitude. The memristor's stochasticity along with the crossbar's inherent parallelism opens the in-memory design space allowing SC elements to be used as sequences are generated efficiently. Simulation results on different programming pulse-width precisions highlight the proposed crossbar's effectiveness in sequence generation, supported by mean absolute error (MAE) results in a standard SC arithmetic operation. Process variations stemming from the crossbar array affecting the sequence generation in SC are investigated.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116824560","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Ultra-Tiny Neural Network for Compensation of Post-soldering Thermal Drift in MEMS Pressure Sensors 微型神经网络补偿MEMS压力传感器焊接后热漂移

2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181480

G. Licciardo, P. Vitolo, S. Bosco, Santo Pennino, D. Pau, M. Pesaturo, L. D. Benedetto, R. Liguori

引用次数: 0

A Unified SoC Lab Course: Combined Teaching of Mixed Signal Aspects, System Integration, Software Development and Documentation 统一的SoC实验课程:混合信号、系统集成、软件开发和文档的综合教学

2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181679

J. Pfau, R. Leys, Marc Neu, Alexey Serdyuk, Ivan Peric, J. Becker

{"title":"A Unified SoC Lab Course: Combined Teaching of Mixed Signal Aspects, System Integration, Software Development and Documentation","authors":"J. Pfau, R. Leys, Marc Neu, Alexey Serdyuk, Ivan Peric, J. Becker","doi":"10.1109/ISCAS46773.2023.10181679","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181679","url":null,"abstract":"University courses for System-on-Chip (SoC) design mostly focus on particular aspects. Whereas this can provide detailed understanding of these aspects, it neglects system integration specific topics such as crossing digital and analog domains. In addition, many courses skip practical issues and do not teach Electronic Design Automation (EDA) tools. This is reasonable in the context of a specialized course, but omitting these techniques often prevents students from making active use of the learned knowledge in their own projects. In the following, we present our technological platform to teach SoC design in a holistic lab course: The course takes students from writing the first line of Verilog code to advanced digital and analog design. It introduces simulation of digital and analog systems, debugging methods for software and hardware, CPU bus architecture, custom peripherals and driver development. This work is prototyped using Field Programmable Gate Arrays (FPGAs) and later transferred to an ASIC target, covering standard cell synthesis and analog layout. At the end of the semester, students finalize the project with technical documentation writing. The course is built on the design of an audio peripheral, combining all topics in a single real-world system. It enables students to apply theoretical aspects from various lectures in the SoC curriculum in practice and equips them with the skills needed to dive deeper into each of the involved topics on their own.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"252 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123940519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 68-85GHz Current-Combining Power Amplifier with 20% PAE and 17dBm Psat in 40-nm CMOS 一个68-85GHz电流组合功率放大器，20% PAE, 17dBm Psat, 40nm CMOS

2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181840

Jiaqin Fang, Guangyin Feng, Yanjie Wang

引用次数: 0

An Area-Efficient Single-Phase-Clocked and Contention-Free Flip-Flop for Ultra-Low-Voltage Operations 一种用于超低电压操作的面积高效单相时钟无争用触发器

2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181517

Xue Yuan, Kun Su, Jingyi He, Shi Xu, Jieyu Li, Weifeng He

引用次数: 0

CKKS-Based Homomorphic Encryption Architecture using Parallel NTT Multiplier 基于ckks的并行NTT乘法器同态加密架构

2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181714

T. Tan, Jisu Kim, Hanho Lee

引用次数: 1

NBSSN: A Neuromorphic Binary Single-Spike Neural Network for Efficient Edge Intelligence 一种高效边缘智能的神经形态二元单尖峰神经网络

2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181850

Ziyang Shen, Fengshi Tian, Jingwen Jiang, Chaoming Fang, X. Xue, Jie Yang, M. Sawan

{"title":"NBSSN: A Neuromorphic Binary Single-Spike Neural Network for Efficient Edge Intelligence","authors":"Ziyang Shen, Fengshi Tian, Jingwen Jiang, Chaoming Fang, X. Xue, Jie Yang, M. Sawan","doi":"10.1109/ISCAS46773.2023.10181850","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181850","url":null,"abstract":"Neuromorphic computing approaches such as Spiking Neural Networks (SNN) have been increasingly adopted in bio-signal processing and interpretation due to its intrinsic neurodynamic attribute. Nevertheless, reconciling performance and power efficiency in SNN implementation is still a bottleneck. Single-spike neural coding scheme, which is an extremely sparse coding scheme, provides a solution to bridge the gap. In this work, a neuromorphic architecture, using binary single spike neural signals, is proposed with both algorithm and hardware implementation. A sparsity-aware spatial-temporal back-propagation training method is proposed together with a single-spike coding scheme. Also, a novel neuromorphic accelerator is co-designed with algorithmic optimization and implemented in 40nm CMOS process. Experimental results show that the proposed processor reaches an accuracy of 94.61% on the MNIST dataset, 93.59% on the N-MNIST dataset, and 93.27% on the ECG dataset, respectively, while consumes $0.173mumathrm{J}$ per ECG classification task and 0.16mm2 on-chip area. The overall power consumption is reduced by 91.68% compared to the state-of-the-art systems.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129389473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Resource-efficient Face Detector Using 1.5-bit Frame-to-frame Delta Quantization for Image Based Always-on Wake-up Application 基于1.5位帧对帧增量量化的图像实时唤醒应用的资源高效人脸检测器

2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10182186

Ning Pu, Kaiji Liu, Heyue Li, Nan Wu, Yaoyu Li, Wen Jia, Zhihua Wang, Hanjun Jiang

{"title":"Resource-efficient Face Detector Using 1.5-bit Frame-to-frame Delta Quantization for Image Based Always-on Wake-up Application","authors":"Ning Pu, Kaiji Liu, Heyue Li, Nan Wu, Yaoyu Li, Wen Jia, Zhihua Wang, Hanjun Jiang","doi":"10.1109/ISCAS46773.2023.10182186","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10182186","url":null,"abstract":"A resource-efficient neural-network-based face detector using 1.5-bit frame-to-frame delta quantization with diagonal spatial feature extraction method is proposed in this paper, which is designed for resource-limited always-on camera sensors. The proposed architecture completes analog-domain frame difference for motion sensing, which triggers digital-domain feature extraction. Based on the sparse and effective features, a lightweight convolutional neural network is devised as a classifier. A self-recorded dataset of 313 videos for humans of different appearances, light intensity and backgrounds is used to validate the performance of the proposed method. Simulation results show that the proposed method achieves 93.6% accuracy using only a $boldsymbol{50times 50}$ pixel array, which is higher than the prior discontinuous temporal change quantization method. Meanwhile, the conservatively estimated power consumption of the proposed method can be reduced by $mathbf{14 times}$ compared to the state-of-the-art work.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129888040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0