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2023 IEEE International Symposium on Circuits and Systems (ISCAS)最新文献

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Online Feedback Region Detection and Flying Capacitor Balancing Technique for Multi-Level Converters 多电平变换器在线反馈区域检测与飞电容平衡技术
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181927
Marc Kanzian, Giovanni Dalla Colletta, Nicolò Zilio, Andreas Berger, M. Agostinelli
{"title":"Online Feedback Region Detection and Flying Capacitor Balancing Technique for Multi-Level Converters","authors":"Marc Kanzian, Giovanni Dalla Colletta, Nicolò Zilio, Andreas Berger, M. Agostinelli","doi":"10.1109/ISCAS46773.2023.10181927","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181927","url":null,"abstract":"Multi-Level Hybrid Flying Capacitor (MLHFC) converters are emerging high energy density dc-dc converters. This paper presents an online feedback stability region detection and flying capacitor (FC) balancing technique for MLHFC converters. The feedback region detector monitors the FC voltage and the internal control signal of the FC control loop to detect the feedback region and adapt the controller accordingly. The proposed detector is control type independent and can be embedded e.g. in a digital Sliding Mode Controller (SMC). In this work, the feedback detection mechanism directly acts inside the controller to balance the FC voltage. The analyzed controller offers a wide range of possible applications, resulting in a very versatile controller for MLHFC converters. Simulation results highlight the effectiveness and robustness of the proposed control architecture.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127284159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SeLiNet: Sentiment enriched Lightweight Network for Emotion Recognition in Images SeLiNet:基于情感的图像情感识别轻量级网络
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181844
Tuneer Khargonkar, Shwetank Choudhary, Sumit Kumar, KR BarathRaj
{"title":"SeLiNet: Sentiment enriched Lightweight Network for Emotion Recognition in Images","authors":"Tuneer Khargonkar, Shwetank Choudhary, Sumit Kumar, KR BarathRaj","doi":"10.1109/ISCAS46773.2023.10181844","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181844","url":null,"abstract":"In this paper, we propose a sentiment-enriched lightweight network SeLiNet and an end-to-end on-device pipeline for contextual emotion recognition in images. SeLiNet model consists of body feature extractor, image aesthetics feature extractor, and multitask learning-based fusion network which jointly estimates discrete emotion and human sentiments tasks. On the EMOTIC dataset, the proposed approach achieves an Average Precision (AP) score of 27.17 in comparison to the baseline AP score of 27.38 while reducing the model size by >85%. In addition, we report an on-device AP score of 26.42 with reduction in model size by >93% when compared to the baseline.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127294049","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimal FOV of Angular Diversity Receiver for Underwater Visible Light Communications 水下可见光通信角分集接收机的最佳视场
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181760
Keigo Matsunaga, Y. Kozawa, H. Habuchi
{"title":"Optimal FOV of Angular Diversity Receiver for Underwater Visible Light Communications","authors":"Keigo Matsunaga, Y. Kozawa, H. Habuchi","doi":"10.1109/ISCAS46773.2023.10181760","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181760","url":null,"abstract":"Recently, underwater visible light communications (UVLC) have attracted much attention for searching and excavating undersea resources effectively. While UVLC suffers from background noise from sunlight, the application of UVLC has been limited to the deep ocean. To realize the UVLC in shallow water, UVLC with the maximal-ratio combining scheme applied to angle diversity receiver with multiple Photodiodes (PDs) at different angles was proposed and, in particular, the optimization of PD placement has been studied. However, as the field of view (FOV) of each PD was fixed at 90 degrees, its optimization has not been studied. Therefore, this paper investigates the optimal FOV of PDs that maximize the average SNR of a square communication area of $n$ centered at the initial position of the receiver. As a result, in an area of $k$, narrowing the FOV of the receiver with evenly distributed PDs to 25 degrees improved the average SNR by about 3 dB compared to the case where the FOV was set to 90 degrees. In the $i$ area, narrowing the FOV of the receiver with PDs placed on the sides to 75 degrees improved the average SNR by about 0.8 dB compared to the case where the FOV was set to 90 degrees.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127209184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Area Efficient and Inductorless Implementation of Continuous-Time Linear Equalization Scheme for High Speed and Low Noise TIA Designs 高速低噪声TIA设计中连续时间线性均衡方案的面积高效和无电感实现
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10182202
Muhammad Bilal Babar, G. Roberts
{"title":"An Area Efficient and Inductorless Implementation of Continuous-Time Linear Equalization Scheme for High Speed and Low Noise TIA Designs","authors":"Muhammad Bilal Babar, G. Roberts","doi":"10.1109/ISCAS46773.2023.10182202","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10182202","url":null,"abstract":"This paper presents an inductorless fully differential and linear design of continuous time linear equalization (CTLE) to simultaneously optimize the bandwidth and noise of transimpedance amplifiers. The proposed CTLE is implemented with RC components in a negative feedback configuration. The proposed design is compared with the conventional CTLE approach that uses an inductor-based implementation. The comparison suggests that the proposed CTLE not only achieves the same equalized bandwidth but also results in less group delay variations as compared to its inductor-based counterpart. Additionally, a TIA is designed using the proposed CTLE approach in GF-BiCMOS 90 nm $(mathbf{f}_{mathrm{t}}=boldsymbol{310}$ GHz) process and its performance is verified by post-layout simulations which include the loading effects of photodiode and $50-Omega$ output loads. As per the authors' best knowledge, the proposed TIA design is the first of its kind in the sense that without the use of inductors in any stage, it can support up to 80 Gb/s NRZ data stream with a transimpedance gain of 72 $mathbf{dB}-Omega$ and an input-referred noise density of about 1.25 pA/sqrt(Hz).","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129007991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-Cost High-Precision Architecture for Arbitrary Floating-Point Nth Root Computation 任意浮点n次根计算的低成本高精度架构
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181944
Wanyuan Hong, Hui Chen, Lianghua Quan, Yuxiang Fu, Li Li
{"title":"Low-Cost High-Precision Architecture for Arbitrary Floating-Point Nth Root Computation","authors":"Wanyuan Hong, Hui Chen, Lianghua Quan, Yuxiang Fu, Li Li","doi":"10.1109/ISCAS46773.2023.10181944","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181944","url":null,"abstract":"In this paper, we propose a feasible architecture with high precision and low resource consumption to compute the $N$th root of a floating-point number, which is mainly based on radix-4 SRT and 2-based Coordinate Rotation Digital Computer (CORDIC). Simulation results show that our method can achieve a relative error of the magnitude of 10−7. Under the same precision requirements, the hardware implementation results show a better performance of our design in terms of area, power, and absolute delay compared with the method based on the generalized hyperbolic CORDIC. After synthesizing it under the TSMC $40n$ m CMOS technology, it can be obtained that our design can achieve an area consumption of $125465.80 mu m^{2}$ and power consumption of 97.8062 mW at the highest frequency of 3.12 GHz.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132849757","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Batteryless Electrochemical Sensing System IC Based on Intra-Body Power and Data Transfer Towards Miniaturized Wearable Sensor Nodes 面向小型化可穿戴传感器节点的无电池电化学传感系统集成电路
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10182004
Ji-Hoon Suh, Hyungjoo Cho, Yeseul Jeon, Minkyu Je
{"title":"A Batteryless Electrochemical Sensing System IC Based on Intra-Body Power and Data Transfer Towards Miniaturized Wearable Sensor Nodes","authors":"Ji-Hoon Suh, Hyungjoo Cho, Yeseul Jeon, Minkyu Je","doi":"10.1109/ISCAS46773.2023.10182004","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10182004","url":null,"abstract":"A batteryless electrochemical sensing system IC for miniaturized wearable sensor nodes is presented. A battery-powered hub node transmits the power and control signal required for the operation of sensor nodes through a human body. The sensor data acquired by sensor nodes are transmitted to the hub node, again through a body channel, using frequency modulation (FM). The intra-body power and data transfer leads to batteryless sensor node operation, and the direct-FM-based sensor interface using a current-controlled oscillator (26.8 and 44.9 kHz/$mumathrm{A}$) simplifies sensor node hardware, which enables miniaturized wearable sensor nodes. By adding a proper multiplexing scheme among sensor nodes, the proposed system can be extended to a further advanced system consisting of distributed wearable sensor nodes.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132994640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Novel Compact Current Driver Circuit with Temperature Feedback Control for 2D Nanophotonic Phased Arrays 基于温度反馈控制的二维纳米光子相控阵电流驱动电路
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181923
Po-Chun Huang, Yang Zhang, Xuetong Sun, Amitabh Varshney, M. Dagenais, M. Peckerar
{"title":"A Novel Compact Current Driver Circuit with Temperature Feedback Control for 2D Nanophotonic Phased Arrays","authors":"Po-Chun Huang, Yang Zhang, Xuetong Sun, Amitabh Varshney, M. Dagenais, M. Peckerar","doi":"10.1109/ISCAS46773.2023.10181923","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181923","url":null,"abstract":"This paper presents a compact driver circuit with independent pixel-level temperature regulation for thermo-optic based 2D Nanophotonic phased arrays (NPAs) in light detection and ranging (LIDAR) and Virtual Reality (VR) applications. To minimize the interconnection density, the proposed driver unit uses only a single electrical contact to its corresponding NPA pixel for both heating and temperature measurement functions. The driver was fabricated using TSMC 65 nm technology and each unit is realized in an area of $15 mumathrm{m}times 15 mumathrm{m}$. The design enables scalable 3D heterogeneous integration between any tile-based NPA with pixel pitch below $15 mumathrm{m}$ and its electrical control system. The temperature regulation performance of the proposed circuit was characterized by intentionally introducing a ±20% variation to the load resistance to simulate the temperature deviation in the NPA. The measured phase errors are suppressed by the feedback controller to a maximum of $0.07pi$ and an average of $0.02pi$ within the full $2pi$ phase shift operation range.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"206 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132102117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Energy-Efficient Stochastic Computing for Convolutional Neural Networks by Using Kernel-wise Parallelism 基于核并行性的卷积神经网络节能随机计算
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181378
Zaipeng Xie, Chenyu Yuan, Likun Li, JiaHao Wu
{"title":"Energy-Efficient Stochastic Computing for Convolutional Neural Networks by Using Kernel-wise Parallelism","authors":"Zaipeng Xie, Chenyu Yuan, Likun Li, JiaHao Wu","doi":"10.1109/ISCAS46773.2023.10181378","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181378","url":null,"abstract":"Stochastic computing (SC) is a low-cost computation paradigm that can replace conventional binary arithmetic to provide a low hardware footprint with high scalability. However, since the SC bitstream length grows with the precision of the represented data, regardless of its lower power consumption, the convolutional SC-based neural networks may not be efficient in hardware area and energy. This work proposes a novel SC accelerator, PSC-Conv, to implement the convolutional layer using a new binary-interfaced stochastic computing architecture. PSC-Conv exploits kernel-wise parallelism in CNNs, reducing hardware footprint and energy consumption. Experimental re-sults show that the proposed implementation excels among several state-of-the-art SC-based implementations regarding area and power efficiency. We also compared the implementations of three modern CNNs, including LeNet-5, MobileNet, and ResNet-50. Experimental results demonstrate that, on average, PSC-Conv can achieve 5.02x speedup and 87.9% energy reduction compared with the binary implementation.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130293725","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-Voltage Clocked Comparator With Flexible Oxide TFT Technology * 具有柔性氧化物TFT技术的低压时钟比较器*
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181745
Suyash Shrivastava, P. Bahubalindruni, Nishtha Kansal
{"title":"Low-Voltage Clocked Comparator With Flexible Oxide TFT Technology *","authors":"Suyash Shrivastava, P. Bahubalindruni, Nishtha Kansal","doi":"10.1109/ISCAS46773.2023.10181745","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181745","url":null,"abstract":"This paper presents a novel clocked comparator circuit using amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor technology. The circuit is fabricated on a 30 $mu mathrm{m}$ flexible polymide substrate. Experimental characterization took place under normal ambient conditions. The comparator circuit employs inverters using pseudo CMOS topology to obtain better swing. It employs a clocked architecture, where the pre-amplification and regeneration phases are controlled by this clock. From measurements, the circuit is showing a VinCM of 1V - 2.5 V, power consumption of 80 $mu mathrm{W}$ average input static offset of 119mV and a swing of 70% at a clock frequency of 5 MHz and an input signal frequency of 5 kHz with a supply voltage $(mathrm{V}_{text{DD}})$ of 4 V. This circuit is showing a 62.5% improvement in speed compared to the state-of-the-art work at a relatively low $mathrm{V}_{text{DD}}$ using single-gate a-IGZO TFT technology. This circuit finds potential applications in smart sensing systems on flexible substrates.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127943788","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Highly Efficient Auto-Polarity Energy Harvesting Circuit Based on Reconfigurable TEG Array for Wearable Applications 基于可重构TEG阵列的可穿戴式高效自极性能量采集电路
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2023-05-21 DOI: 10.1109/ISCAS46773.2023.10181446
Zihao Fan, Yunhao Li, Qiping Wan, Su Yang, Xiaoming Tao, Yuan Gao
{"title":"A Highly Efficient Auto-Polarity Energy Harvesting Circuit Based on Reconfigurable TEG Array for Wearable Applications","authors":"Zihao Fan, Yunhao Li, Qiping Wan, Su Yang, Xiaoming Tao, Yuan Gao","doi":"10.1109/ISCAS46773.2023.10181446","DOIUrl":"https://doi.org/10.1109/ISCAS46773.2023.10181446","url":null,"abstract":"This paper presents an auto-polarity thermo-electric energy harvesting circuit based on the reconfigurable thermoelectric generator (TEG) array. The auto-polarity function is achieved by simply altering the operating mode of the inverse current detector without adding extra power overhead and hardware cost. In addition, the proposed circuit consists of the TEG array and switches, removing the need for bulky inductor-based or switched-capacitor DC-DC converters. Hill-climbing algorithm is used for maximum power point tracking (MPPT). The operating frequency of the system is 0.2 Hz with overall dynamic power consumption of only 1.2mW. Over a wide range of temperature gradients, the static power is less than $0.1mu mathrm{W}$ with a peak efficiency of 99.6%.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128991769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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